| 27 registers, 138 instructions: |
| 0 r0 = uniform32 ptr0 4 |
| 1 r1 = uniform32 ptr0 8 |
| 2 r2 = uniform32 ptr0 C |
| 3 r3 = uniform32 ptr0 10 |
| 4 r4 = uniform32 ptr0 14 |
| 5 r5 = uniform32 ptr0 18 |
| 6 r6 = uniform32 ptr0 1C |
| 7 r7 = uniform32 ptr0 20 |
| 8 r8 = splat 0 (0) |
| 9 r9 = splat FFFFFFFF (nan) |
| 10 r10 = div_f32 r0 r2 |
| 11 r11 = div_f32 r2 r0 |
| 12 r12 = mul_f32 r0 r2 |
| 13 r8 = sub_f32 r8 r0 |
| 14 r8 = mul_f32 r2 r8 |
| 15 r13 = splat 42280000 (42) |
| 16 r13 = mul_f32 r1 r13 |
| 17 r14 = splat 422C0000 (43) |
| 18 r14 = mul_f32 r1 r14 |
| 19 r15 = splat 42300000 (44) |
| 20 r15 = mul_f32 r1 r15 |
| 21 r16 = splat 3F800000 (1) |
| 22 r16 = add_f32 r0 r16 |
| 23 r17 = mul_f32 r13 r16 |
| 24 r18 = mul_f32 r8 r16 |
| 25 r19 = mul_f32 r12 r16 |
| 26 r20 = eq_f32 r13 r17 |
| 27 r21 = eq_f32 r8 r18 |
| 28 r22 = eq_f32 r12 r19 |
| 29 r21 = bit_and r20 r21 |
| 30 r21 = bit_and r22 r21 |
| 31 r22 = bit_and r13 r21 |
| 32 r20 = bit_and r8 r21 |
| 33 r23 = bit_and r12 r21 |
| 34 r24 = bit_and r17 r21 |
| 35 r18 = bit_and r18 r21 |
| 36 r19 = bit_and r19 r21 |
| 37 r24 = neq_f32 r22 r24 |
| 38 r18 = neq_f32 r20 r18 |
| 39 r19 = neq_f32 r23 r19 |
| 40 r18 = bit_or r24 r18 |
| 41 r18 = bit_or r19 r18 |
| 42 r18 = bit_and r21 r18 |
| 43 r19 = bit_xor r9 r18 |
| 44 r19 = bit_and r21 r19 |
| 45 r21 = bit_and r13 r19 |
| 46 r24 = bit_and r10 r19 |
| 47 r23 = bit_and r11 r19 |
| 48 r20 = bit_and r17 r19 |
| 49 r22 = mul_f32 r10 r16 |
| 50 r25 = bit_and r19 r22 |
| 51 r16 = mul_f32 r11 r16 |
| 52 r26 = bit_and r19 r16 |
| 53 r20 = neq_f32 r21 r20 |
| 54 r25 = neq_f32 r24 r25 |
| 55 r26 = neq_f32 r23 r26 |
| 56 r25 = bit_or r20 r25 |
| 57 r25 = bit_or r26 r25 |
| 58 r18 = select r19 r25 r18 |
| 59 r19 = bit_and r19 r18 |
| 60 r25 = bit_and r13 r19 |
| 61 r26 = bit_and r10 r19 |
| 62 r11 = bit_and r11 r19 |
| 63 r17 = bit_and r17 r19 |
| 64 r22 = bit_and r22 r19 |
| 65 r16 = bit_and r16 r19 |
| 66 r17 = eq_f32 r25 r17 |
| 67 r22 = eq_f32 r26 r22 |
| 68 r16 = eq_f32 r11 r16 |
| 69 r22 = bit_and r17 r22 |
| 70 r22 = bit_and r16 r22 |
| 71 r18 = select r19 r22 r18 |
| 72 r18 = bit_xor r9 r18 |
| 73 r18 = bit_and r19 r18 |
| 74 r19 = splat 40000000 (2) |
| 75 r19 = add_f32 r0 r19 |
| 76 r22 = bit_and r13 r18 |
| 77 r16 = bit_and r14 r18 |
| 78 r17 = bit_and r15 r18 |
| 79 r11 = mul_f32 r13 r19 |
| 80 r26 = bit_and r18 r11 |
| 81 r25 = mul_f32 r14 r19 |
| 82 r20 = bit_and r18 r25 |
| 83 r26 = neq_f32 r22 r26 |
| 84 r20 = neq_f32 r16 r20 |
| 85 r17 = neq_f32 r17 r17 |
| 86 r20 = bit_or r26 r20 |
| 87 r20 = bit_or r17 r20 |
| 88 r20 = bit_and r18 r20 |
| 89 r18 = bit_and r18 r20 |
| 90 r13 = bit_and r13 r18 |
| 91 r14 = bit_and r14 r18 |
| 92 r15 = bit_and r15 r18 |
| 93 r11 = bit_and r11 r18 |
| 94 r25 = bit_and r25 r18 |
| 95 r11 = eq_f32 r13 r11 |
| 96 r25 = eq_f32 r14 r25 |
| 97 r15 = eq_f32 r15 r15 |
| 98 r25 = bit_and r11 r25 |
| 99 r25 = bit_and r15 r25 |
| 100 r20 = select r18 r25 r20 |
| 101 r25 = bit_xor r9 r20 |
| 102 r25 = bit_and r18 r25 |
| 103 r18 = bit_and r10 r25 |
| 104 r15 = bit_and r8 r25 |
| 105 r11 = bit_and r12 r25 |
| 106 r14 = mul_f32 r10 r19 |
| 107 r13 = bit_and r25 r14 |
| 108 r19 = mul_f32 r8 r19 |
| 109 r17 = bit_and r25 r19 |
| 110 r13 = neq_f32 r18 r13 |
| 111 r17 = neq_f32 r15 r17 |
| 112 r11 = neq_f32 r11 r11 |
| 113 r17 = bit_or r13 r17 |
| 114 r17 = bit_or r11 r17 |
| 115 r20 = select r25 r17 r20 |
| 116 r25 = bit_and r25 r20 |
| 117 r10 = bit_and r10 r25 |
| 118 r8 = bit_and r8 r25 |
| 119 r12 = bit_and r12 r25 |
| 120 r14 = bit_and r14 r25 |
| 121 r19 = bit_and r19 r25 |
| 122 r14 = eq_f32 r10 r14 |
| 123 r19 = eq_f32 r8 r19 |
| 124 r12 = eq_f32 r12 r12 |
| 125 r19 = bit_and r14 r19 |
| 126 r19 = bit_and r12 r19 |
| 127 r20 = select r25 r19 r20 |
| 128 r20 = bit_xor r9 r20 |
| 129 r20 = bit_and r25 r20 |
| 130 r4 = select r20 r0 r4 |
| 131 r5 = select r20 r1 r5 |
| 132 r6 = select r20 r2 r6 |
| 133 r7 = select r20 r3 r7 |
| loop: |
| 134 store32 ptr1 r4 |
| 135 store32 ptr2 r5 |
| 136 store32 ptr3 r6 |
| 137 store32 ptr4 r7 |
