| /* |
| * Copyright 2022 Google LLC |
| * |
| * Use of this source code is governed by a BSD-style license that can be |
| * found in the LICENSE file. |
| */ |
| |
| #ifndef SkFeatures_DEFINED |
| #define SkFeatures_DEFINED |
| |
| #if !defined(SK_BUILD_FOR_ANDROID) && !defined(SK_BUILD_FOR_IOS) && !defined(SK_BUILD_FOR_WIN) && \ |
| !defined(SK_BUILD_FOR_UNIX) && !defined(SK_BUILD_FOR_MAC) |
| |
| #ifdef __APPLE__ |
| #include <TargetConditionals.h> |
| #endif |
| |
| #if defined(_WIN32) || defined(__SYMBIAN32__) |
| #define SK_BUILD_FOR_WIN |
| #elif defined(ANDROID) || defined(__ANDROID__) |
| #define SK_BUILD_FOR_ANDROID |
| #elif defined(linux) || defined(__linux) || defined(__FreeBSD__) || \ |
| defined(__OpenBSD__) || defined(__sun) || defined(__NetBSD__) || \ |
| defined(__DragonFly__) || defined(__Fuchsia__) || \ |
| defined(__GLIBC__) || defined(__GNU__) || defined(__unix__) |
| #define SK_BUILD_FOR_UNIX |
| #elif TARGET_OS_IPHONE || TARGET_IPHONE_SIMULATOR |
| #define SK_BUILD_FOR_IOS |
| #else |
| #define SK_BUILD_FOR_MAC |
| #endif |
| #endif // end SK_BUILD_FOR_* |
| |
| |
| #if defined(SK_BUILD_FOR_WIN) && !defined(__clang__) |
| #if !defined(SK_RESTRICT) |
| #define SK_RESTRICT __restrict |
| #endif |
| #if !defined(SK_WARN_UNUSED_RESULT) |
| #define SK_WARN_UNUSED_RESULT |
| #endif |
| #endif |
| |
| #if !defined(SK_RESTRICT) |
| #define SK_RESTRICT __restrict__ |
| #endif |
| |
| #if !defined(SK_CPU_BENDIAN) && !defined(SK_CPU_LENDIAN) |
| #if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) |
| #define SK_CPU_BENDIAN |
| #elif defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) |
| #define SK_CPU_LENDIAN |
| #elif defined(__sparc) || defined(__sparc__) || \ |
| defined(_POWER) || defined(__powerpc__) || \ |
| defined(__ppc__) || defined(__hppa) || \ |
| defined(__PPC__) || defined(__PPC64__) || \ |
| defined(_MIPSEB) || defined(__ARMEB__) || \ |
| defined(__s390__) || \ |
| (defined(__sh__) && defined(__BIG_ENDIAN__)) || \ |
| (defined(__ia64) && defined(__BIG_ENDIAN__)) |
| #define SK_CPU_BENDIAN |
| #else |
| #define SK_CPU_LENDIAN |
| #endif |
| #endif |
| |
| #if defined(__i386) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_X64) |
| #define SK_CPU_X86 1 |
| #endif |
| |
| /** |
| * SK_CPU_SSE_LEVEL |
| * |
| * If defined, SK_CPU_SSE_LEVEL should be set to the highest supported level. |
| * On non-intel CPU this should be undefined. |
| */ |
| #define SK_CPU_SSE_LEVEL_SSE1 10 |
| #define SK_CPU_SSE_LEVEL_SSE2 20 |
| #define SK_CPU_SSE_LEVEL_SSE3 30 |
| #define SK_CPU_SSE_LEVEL_SSSE3 31 |
| #define SK_CPU_SSE_LEVEL_SSE41 41 |
| #define SK_CPU_SSE_LEVEL_SSE42 42 |
| #define SK_CPU_SSE_LEVEL_AVX 51 |
| #define SK_CPU_SSE_LEVEL_AVX2 52 |
| #define SK_CPU_SSE_LEVEL_SKX 60 |
| |
| // TODO(brianosman,kjlubick) clean up these checks |
| |
| // Are we in GCC/Clang? |
| #ifndef SK_CPU_SSE_LEVEL |
| // These checks must be done in descending order to ensure we set the highest |
| // available SSE level. |
| #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ |
| defined(__AVX512BW__) && defined(__AVX512VL__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX |
| #elif defined(__AVX2__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 |
| #elif defined(__AVX__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX |
| #elif defined(__SSE4_2__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE42 |
| #elif defined(__SSE4_1__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE41 |
| #elif defined(__SSSE3__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSSE3 |
| #elif defined(__SSE3__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE3 |
| #elif defined(__SSE2__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 |
| #endif |
| #endif |
| |
| // Are we in VisualStudio? |
| #ifndef SK_CPU_SSE_LEVEL |
| // These checks must be done in descending order to ensure we set the highest |
| // available SSE level. 64-bit intel guarantees at least SSE2 support. |
| #if defined(__AVX512F__) && defined(__AVX512DQ__) && defined(__AVX512CD__) && \ |
| defined(__AVX512BW__) && defined(__AVX512VL__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SKX |
| #elif defined(__AVX2__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX2 |
| #elif defined(__AVX__) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_AVX |
| #elif defined(_M_X64) || defined(_M_AMD64) |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 |
| #elif defined(_M_IX86_FP) |
| #if _M_IX86_FP >= 2 |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE2 |
| #elif _M_IX86_FP == 1 |
| #define SK_CPU_SSE_LEVEL SK_CPU_SSE_LEVEL_SSE1 |
| #endif |
| #endif |
| #endif |
| |
| // ARM defines |
| #if defined(__arm__) && (!defined(__APPLE__) || !TARGET_IPHONE_SIMULATOR) |
| #define SK_CPU_ARM32 |
| #elif defined(__aarch64__) |
| #define SK_CPU_ARM64 |
| #endif |
| |
| // All 64-bit ARM chips have NEON. Many 32-bit ARM chips do too. |
| #if !defined(SK_ARM_HAS_NEON) && defined(__ARM_NEON) |
| #define SK_ARM_HAS_NEON |
| #endif |
| |
| #if defined(__ARM_FEATURE_CRC32) |
| #define SK_ARM_HAS_CRC32 |
| #endif |
| |
| #endif // SkFeatures_DEFINED |