commit 48835c76c8df62fab4827a9835b351718d20df4b
author Roberto Ierusalimschy <roberto@inf.puc-rio.br> Thu Nov 25 10:11:05 2021 -0300
committer Roberto Ierusalimschy <roberto@inf.puc-rio.br> Thu Nov 25 10:11:05 2021 -0300
tree 499d4adb856f159107f668d22ba0c196718de4e8
parent 6b3e116d44eed387aa93126c48eae8a64b38bfc2

Wrong assert in 'collectvalidlines'

ldebug.c

diff --git a/ldebug.c b/ldebug.c
index 30a2882..dc5f78c 100644
--- a/ldebug.c
+++ b/ldebug.c
@@ -304,7 +304,7 @@
     if (!p->is_vararg)  /* regular function? */
       i = 0;  /* consider all instructions */
     else {  /* vararg function */
-      lua_assert(p->code[0] == OP_VARARGPREP);
+      lua_assert(GET_OPCODE(p->code[0]) == OP_VARARGPREP);
       currentline = nextline(p, currentline, 0);
       i = 1;  /* skip first instruction (OP_VARARGPREP) */
     }

testes/db.lua

diff --git a/testes/db.lua b/testes/db.lua
index 11dfd26..e069972 100644
--- a/testes/db.lua
+++ b/testes/db.lua
@@ -225,7 +225,7 @@
     -- 5th line is empty
   end, {3, 4, 6})
 
-  checkactivelines(function (...) end, {0})
+  checkactivelines(function (a, b, ...) end, {0})
 
   checkactivelines(function (a, b)
   end, {1})