Cpu::Type is excented to 64-bit value
diff --git a/readme.md b/readme.md
index 88cf04d..a526c89 100644
--- a/readme.md
+++ b/readme.md
@@ -277,7 +277,7 @@
History
-------------
-* 2015/Jar/28 ver 4.71 support adcx, adox, cmpxchg
+* 2015/Jar/28 ver 4.71 support adcx, adox, cmpxchg, rdseed, stac
* 2014/Oct/14 ver 4.70 support MmapAllocator
* 2014/Jun/13 ver 4.62 disable warning of VC2014
* 2014/May/30 ver 4.61 support bt, bts, btr, btc
diff --git a/readme.txt b/readme.txt
index e9f757c..c594c02 100644
--- a/readme.txt
+++ b/readme.txt
@@ -296,7 +296,7 @@
-----------------------------------------------------------------------------
◎履歴
-2015/01/28 ver 4.71 adcx, adox, cmpxchgのサポート
+2015/01/28 ver 4.71 adcx, adox, cmpxchg, rdseed, stacのサポート
2014/10/14 ver 4.70 MmapAllocatorのサポート
2014/06/13 ver 4.62 VC2014で警告抑制
2014/05/30 ver 4.61 bt, bts, btr, btcのサポート
diff --git a/sample/test_util.cpp b/sample/test_util.cpp
index 3a09095..5860d78 100644
--- a/sample/test_util.cpp
+++ b/sample/test_util.cpp
@@ -53,6 +53,7 @@
{ Cpu::tRDSEED, "rdseed" },
{ Cpu::tSMAP, "smap" },
{ Cpu::tHLE, "hle" },
+ { Cpu::tRTM, "rtm" },
};
for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
if (cpu.has(tbl[i].type)) printf(" %s", tbl[i].str);
diff --git a/xbyak/xbyak_util.h b/xbyak/xbyak_util.h
index 3bff6cd..7f3e336 100644
--- a/xbyak/xbyak_util.h
+++ b/xbyak/xbyak_util.h
@@ -58,7 +58,7 @@
CPU detection class
*/
class Cpu {
- unsigned int type_;
+ uint64 type_;
unsigned int get32bitAsBE(const char *x) const
{
return x[0] | (x[1] << 8) | (x[2] << 16) | (x[3] << 24);
@@ -124,43 +124,45 @@
return ((uint64)edx << 32) | eax;
#endif
}
- enum Type {
- NONE = 0,
- tMMX = 1 << 0,
- tMMX2 = 1 << 1,
- tCMOV = 1 << 2,
- tSSE = 1 << 3,
- tSSE2 = 1 << 4,
- tSSE3 = 1 << 5,
- tSSSE3 = 1 << 6,
- tSSE41 = 1 << 7,
- tSSE42 = 1 << 8,
- tPOPCNT = 1 << 9,
- tAESNI = 1 << 10,
- tSSE5 = 1 << 11,
- tOSXSAVE = 1 << 12,
- tPCLMULQDQ = 1 << 13,
- tAVX = 1 << 14,
- tFMA = 1 << 15,
+ typedef uint64 Type;
+ static const Type NONE = 0;
+ static const Type tMMX = 1 << 0;
+ static const Type tMMX2 = 1 << 1;
+ static const Type tCMOV = 1 << 2;
+ static const Type tSSE = 1 << 3;
+ static const Type tSSE2 = 1 << 4;
+ static const Type tSSE3 = 1 << 5;
+ static const Type tSSSE3 = 1 << 6;
+ static const Type tSSE41 = 1 << 7;
+ static const Type tSSE42 = 1 << 8;
+ static const Type tPOPCNT = 1 << 9;
+ static const Type tAESNI = 1 << 10;
+ static const Type tSSE5 = 1 << 11;
+ static const Type tOSXSAVE = 1 << 12;
+ static const Type tPCLMULQDQ = 1 << 13;
+ static const Type tAVX = 1 << 14;
+ static const Type tFMA = 1 << 15;
- t3DN = 1 << 16,
- tE3DN = 1 << 17,
- tSSE4a = 1 << 18,
- tRDTSCP = 1 << 19,
- tAVX2 = 1 << 20,
- tBMI1 = 1 << 21, // andn, bextr, blsi, blsmsk, blsr, tzcnt
- tBMI2 = 1 << 22, // bzhi, mulx, pdep, pext, rorx, sarx, shlx, shrx
- tLZCNT = 1 << 23,
- tENHANCED_REP = 1 << 26, // enhanced rep movsb/stosb
- tRDRAND = 1 << 27,
- tADX = 1 << 28, // adcx, adox
- tRDSEED = 1 << 29, // rdseed
- tSMAP = 1 << 30, // stac
- tHLE = 1 << 31, // xacquire, xrelease, xtest
+ static const Type t3DN = 1 << 16;
+ static const Type tE3DN = 1 << 17;
+ static const Type tSSE4a = 1 << 18;
+ static const Type tRDTSCP = 1 << 19;
+ static const Type tAVX2 = 1 << 20;
+ static const Type tBMI1 = 1 << 21; // andn, bextr, blsi, blsmsk, blsr, tzcnt
+ static const Type tBMI2 = 1 << 22; // bzhi, mulx, pdep, pext, rorx, sarx, shlx, shrx
+ static const Type tLZCNT = 1 << 23;
- tINTEL = 1 << 24,
- tAMD = 1 << 25
- };
+ static const Type tINTEL = 1 << 24;
+ static const Type tAMD = 1 << 25;
+
+ static const Type tENHANCED_REP = 1 << 26; // enhanced rep movsb/stosb
+ static const Type tRDRAND = 1 << 27;
+ static const Type tADX = 1 << 28; // adcx, adox
+ static const Type tRDSEED = 1 << 29; // rdseed
+ static const Type tSMAP = 1 << 30; // stac
+ static const Type tHLE = uint64(1) << 31; // xacquire, xrelease, xtest
+ static const Type tRTM = uint64(1) << 32; // xbegin, xend, xabort
+
Cpu()
: type_(NONE)
{
@@ -218,6 +220,7 @@
if (data[1] & (1U << 19)) type_ |= tADX;
if (data[1] & (1U << 20)) type_ |= tSMAP;
if (data[1] & (1U << 4)) type_ |= tHLE;
+ if (data[1] & (1U << 11)) type_ |= tRTM;
}
setFamily();
}
