commit a49bb25c362e2647788a52ccb4fd257793bcaac7
author MITSUNARI Shigeo <herumi@nifty.com> Mon Jul 11 08:07:01 2016 +0900
committer MITSUNARI Shigeo <herumi@nifty.com> Mon Jul 11 08:07:01 2016 +0900
tree e958f0d6b902aae1597e4584e0f0180175ec186a
parent 7a2fe3c85e8fded0fa812f3b0b339bda879030bc

add vpand{d,q,nd,nq}

gen/gen_avx512.cpp

diff --git a/gen/gen_avx512.cpp b/gen/gen_avx512.cpp
index 648e588..f2e42d5 100644
--- a/gen/gen_avx512.cpp
+++ b/gen/gen_avx512.cpp
@@ -167,7 +167,11 @@
 		bool hasIMM;
 	} tbl[] = {
 		{ 0x03, "valignd", T_EVEX | T_MUST_EVEX | T_66 | T_0F3A | T_EW0 | T_YMM, true },
-		{ 0x03, "valignq", T_EVEX | T_MUST_EVEX | T_66 | T_0F3A | T_EW1 | T_YMM, true }
+		{ 0x03, "valignq", T_EVEX | T_MUST_EVEX | T_66 | T_0F3A | T_EW1 | T_YMM, true },
+		{ 0xDB, "vpandd", T_EVEX | T_MUST_EVEX | T_YMM | T_66 | T_0F | T_EW0 | T_B32, false },
+		{ 0xDB, "vpandq", T_EVEX | T_MUST_EVEX | T_YMM | T_66 | T_0F | T_EW1 | T_B64, false },
+		{ 0xDF, "vpandnd", T_EVEX | T_MUST_EVEX | T_YMM | T_66 | T_0F | T_EW0 | T_B32, false },
+		{ 0xDF, "vpandnq", T_EVEX | T_MUST_EVEX | T_YMM | T_66 | T_0F | T_EW1 | T_B64, false },
 	};
 	for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
 		const Tbl *p = &tbl[i];

test/make_nm.cpp

diff --git a/test/make_nm.cpp b/test/make_nm.cpp
index ab15a6d..ffc226a 100644
--- a/test/make_nm.cpp
+++ b/test/make_nm.cpp
@@ -2766,6 +2766,12 @@
 
 			{ "vpaddusw", XMM_KZ, _XMM, _XMM | MEM },
 			{ "vpaddusw", ZMM_KZ, _ZMM, _ZMM | MEM },
+
+			{ "vpandd", ZMM_KZ, _ZMM, _ZMM | M_1to16 },
+			{ "vpandq", ZMM_KZ, _ZMM, _ZMM | M_1to8 },
+
+			{ "vpandnd", ZMM_KZ, _ZMM, _ZMM | M_1to16 },
+			{ "vpandnq", ZMM_KZ, _ZMM, _ZMM | M_1to8 },
 		};
 		for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
 			const Tbl& p = tbl[i];

xbyak/xbyak_avx512.h

diff --git a/xbyak/xbyak_avx512.h b/xbyak/xbyak_avx512.h
index b79cc3c..cb4f142 100644
--- a/xbyak/xbyak_avx512.h
+++ b/xbyak/xbyak_avx512.h
@@ -83,4 +83,8 @@
 void vmovdqu64(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_0F | T_F3 | T_EW1 | T_YMM | T_EVEX | T_ER_X | T_ER_Y | T_ER_Z | T_MUST_EVEX, 0x7F); }
 void valignd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_EW0 | T_YMM | T_EVEX | T_MUST_EVEX, 0x03, imm); }
 void valignq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8 imm) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_EW1 | T_YMM | T_EVEX | T_MUST_EVEX, 0x03, imm); }
+void vpandd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_EW0 | T_YMM | T_EVEX | T_MUST_EVEX | T_B32, 0xDB); }
+void vpandq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_MUST_EVEX | T_B64, 0xDB); }
+void vpandnd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_EW0 | T_YMM | T_EVEX | T_MUST_EVEX | T_B32, 0xDF); }
+void vpandnq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_MUST_EVEX | T_B64, 0xDF); }
 #endif