Detect MIPS DSP and DSPR2 programattically.

Procedure:

$ platform_tools/android/toolchains/ndk-r10c-mips-darwin_v14/bin/mipsel-linux-android-gcc -dM -E - < /dev/null | sort > vanilla.mips
$ platform_tools/android/toolchains/ndk-r10c-mips-darwin_v14/bin/mipsel-linux-android-gcc -mdsp -dM -E - < /dev/null | sort > dsp.mips
$ platform_tools/android/toolchains/ndk-r10c-mips-darwin_v14/bin/mipsel-linux-android-gcc -mdspr2 -dM -E - < /dev/null | sort > dspr2.mips

$ diff vanilla.mips dsp.mips
239a240,241
> #define __mips_dsp 1
> #define __mips_dsp_rev 1

$ diff vanilla.mips dspr2.mips
239a240,242
> #define __mips_dsp 1
> #define __mips_dsp_rev 2
> #define __mips_dspr2 1

So, defined(__mips_dsp) -> SK_MIPS_HAS_DSP, defined(__mips_dspr2) -> SK_MIPS_HAS_DSPR2.

BUG=skia:

Review URL: https://codereview.chromium.org/1274873002
diff --git a/gyp/common_conditions.gypi b/gyp/common_conditions.gypi
index cce9f15..2a927d1 100644
--- a/gyp/common_conditions.gypi
+++ b/gyp/common_conditions.gypi
@@ -296,32 +296,13 @@
             ],
           }],
           [ '"mips" in skia_arch_type', {
-            'cflags': [
-              '-EL',
-            ],
+            'cflags': [ '-EL' ],
             'conditions': [
               [ 'mips_arch_variant == "mips32r2"', {
-                'cflags': [
-                  '-march=mips32r2',
-                ],
+                'cflags': [ '-march=mips32r2' ],
                 'conditions': [
-                  [ 'mips_dsp == 1', {
-                    'cflags': [
-                      '-mdsp',
-                    ],
-                    'defines': [
-                      'SK_MIPS_HAS_DSP',
-                    ],
-                  }],
-                  [ 'mips_dsp == 2', {
-                    'cflags': [
-                      '-mdspr2',
-                    ],
-                    'defines': [
-                      'SK_MIPS_HAS_DSP',
-                      'SK_MIPS_HAS_DSPR2',
-                    ],
-                  }],
+                  [ 'mips_dsp == 1', { 'cflags': [ '-mdsp'   ] }],
+                  [ 'mips_dsp == 2', { 'cflags': [ '-mdspr2' ] }],
                 ],
               }],
             ],
diff --git a/src/core/SkBlitter_RGB16.cpp b/src/core/SkBlitter_RGB16.cpp
index 8caf908..d87c636 100644
--- a/src/core/SkBlitter_RGB16.cpp
+++ b/src/core/SkBlitter_RGB16.cpp
@@ -14,7 +14,7 @@
 #include "SkUtilsArm.h"
 #include "SkXfermode.h"
 
-#if SK_MIPS_HAS_DSP
+#if defined(__mips_dsp)
 extern void blitmask_d565_opaque_mips(int width, int height, uint16_t* device,
                                       unsigned deviceRB, const uint8_t* alpha,
                                       uint32_t expanded32, unsigned maskRB);
@@ -374,7 +374,7 @@
 #define SK_BLITBWMASK_DEVTYPE               uint16_t
 #include "SkBlitBWMaskTemplate.h"
 
-#if !defined(SK_MIPS_HAS_DSP)
+#if !defined(__mips_dsp)
 static U16CPU blend_compact(uint32_t src32, uint32_t dst32, unsigned scale5) {
     return SkCompact_rgb_16(dst32 + ((src32 - dst32) * scale5 >> 5));
 }
@@ -465,7 +465,7 @@
         alpha += maskRB;
     } while (--height != 0);
 #undef    UNROLL
-#elif SK_MIPS_HAS_DSP
+#elif defined(__mips_dsp)
     blitmask_d565_opaque_mips(width, height, device, deviceRB, alpha, expanded32, maskRB);
 #else   // non-neon code
     do {
diff --git a/src/opts/SkBlitRow_opts_mips_dsp.cpp b/src/opts/SkBlitRow_opts_mips_dsp.cpp
index 7ef75c4..869a04a 100644
--- a/src/opts/SkBlitRow_opts_mips_dsp.cpp
+++ b/src/opts/SkBlitRow_opts_mips_dsp.cpp
@@ -34,7 +34,7 @@
             "and             %[t1],    %[s0],    %[s5]     \n\t"
             "shra.ph         %[t0],    %[s0],    5         \n\t"
             "and             %[t2],    %[t0],    %[s6]     \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
             "shrl.ph         %[t3],    %[s0],    11        \n\t"
 #else
             "shra.ph         %[t0],    %[s0],    11        \n\t"
@@ -46,7 +46,7 @@
             "ins             %[s2],    %[s1],    16, 16    \n\t"
             "preceu.ph.qbra  %[t0],    %[s2]               \n\t"
             "shrl.qb         %[t6],    %[t0],    3         \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
             "shrl.ph         %[t5],    %[s2],    10        \n\t"
 #else
             "shra.ph         %[t0],    %[s2],    10        \n\t"
@@ -303,7 +303,7 @@
         "lw              %[t2],    4(%[src])           \n\t"
         "precrq.ph.w     %[t3],    %[t0],    %[t2]     \n\t"
         "preceu.ph.qbra  %[t9],    %[t3]               \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append          %[t0],    %[t2],    16        \n\t"
         "preceu.ph.qbra  %[t4],    %[t0]               \n\t"
         "preceu.ph.qbla  %[t5],    %[t0]               \n\t"
@@ -328,7 +328,7 @@
         "subu.qb         %[t4],    %[t3],    %[t2]     \n\t"
         "shra.ph         %[t8],    %[t4],    2         \n\t"
         "precrq.ph.w     %[t0],    %[t6],    %[t7]     \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append          %[t6],    %[t7],    16        \n\t"
 #else
         "sll             %[t6],    %[t6],    16        \n\t"
@@ -425,7 +425,7 @@
     "5:                                                    \n\t"
         "sll             %[t3],     %[t0],     7           \n\t"
         "sll             %[t4],     %[t1],     7           \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append          %[t0],     %[t1],     16          \n\t"
 #else
         "sll             %[t0],     %[t0],     8           \n\t"
@@ -442,7 +442,7 @@
         "preceu.ph.qbra  %[t6],     %[t6]                  \n\t"
         "lh              %[t2],     0(%[dst])              \n\t"
         "lh              %[s1],     2(%[dst])              \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append          %[t2],     %[s1],     16          \n\t"
 #else
         "sll             %[s1],     %[s1],     16          \n\t"
@@ -575,7 +575,7 @@
         "lw             %[t1],    4(%[src])             \n\t"
         "precrq.ph.w    %[t2],    %[t0],    %[t1]       \n\t"
         "preceu.ph.qbra %[t8],    %[t2]                 \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append         %[t0],    %[t1],    16          \n\t"
 #else
         "sll            %[t0],    %[t0],    16          \n\t"
@@ -592,7 +592,7 @@
         "lh             %[t0],    0(%[dst])             \n\t"
         "lh             %[t1],    2(%[dst])             \n\t"
         "and            %[t1],    %[t1],    0xffff      \n\t"
-#ifdef SK_MIPS_HAS_DSPR2
+#ifdef __mips_dspr2
         "append         %[t0],    %[t1],    16          \n\t"
 #else
         "sll            %[t5],    %[t0],    16          \n\t"