Address comments and format
diff --git a/sparse_strips/vello_cpu/src/dispatch/mod.rs b/sparse_strips/vello_cpu/src/dispatch/mod.rs
index 33708b7..56f7179 100644
--- a/sparse_strips/vello_cpu/src/dispatch/mod.rs
+++ b/sparse_strips/vello_cpu/src/dispatch/mod.rs
@@ -18,13 +18,7 @@
 
 pub(crate) trait Dispatcher: Debug + Send + Sync {
     fn wide(&self) -> &Wide;
-    fn generate_wide_cmd(
-        &mut self,
-        strip_buf: &[Strip],
-        fill_rule: Fill,
-        paint: Paint,
-        thread_idx: u8,
-    );
+    fn generate_wide_cmd(&mut self, strip_buf: &[Strip], fill_rule: Fill, paint: Paint);
     fn fill_path(
         &mut self,
         path: &BezPath,
diff --git a/sparse_strips/vello_cpu/src/dispatch/multi_threaded.rs b/sparse_strips/vello_cpu/src/dispatch/multi_threaded.rs
index 28c82ab..f16b5a3 100644
--- a/sparse_strips/vello_cpu/src/dispatch/multi_threaded.rs
+++ b/sparse_strips/vello_cpu/src/dispatch/multi_threaded.rs
@@ -499,13 +499,7 @@
         }
     }
 
-    fn generate_wide_cmd(
-        &mut self,
-        strip_buf: &[Strip],
-        fill_rule: Fill,
-        paint: Paint,
-        thread_idx: u8,
-    ) {
+    fn generate_wide_cmd(&mut self, strip_buf: &[Strip], fill_rule: Fill, paint: Paint) {
         // Note that we are essentially round-tripping here: The wide container is inside of the
         // main thread, but we first send a render task to a child thread which basically just
         // forwards it back to the main thread again. We cannot apply the wide command directly
@@ -516,7 +510,9 @@
         self.register_task(RenderTask::WideCommand {
             strip_buf: strip_buf.into(),
             fill_rule,
-            thread_idx,
+            // Recordings are currently always built on the main thread and thus have a `thread_idx`
+            // of 0.
+            thread_idx: 0,
             paint,
         });
     }
diff --git a/sparse_strips/vello_cpu/src/dispatch/single_threaded.rs b/sparse_strips/vello_cpu/src/dispatch/single_threaded.rs
index 29de25b..bc5b751 100644
--- a/sparse_strips/vello_cpu/src/dispatch/single_threaded.rs
+++ b/sparse_strips/vello_cpu/src/dispatch/single_threaded.rs
@@ -192,14 +192,8 @@
         }
     }
 
-    fn generate_wide_cmd(
-        &mut self,
-        strip_buf: &[Strip],
-        fill_rule: Fill,
-        paint: Paint,
-        thread_idx: u8,
-    ) {
-        self.wide.generate(strip_buf, fill_rule, paint, thread_idx);
+    fn generate_wide_cmd(&mut self, strip_buf: &[Strip], fill_rule: Fill, paint: Paint) {
+        self.wide.generate(strip_buf, fill_rule, paint, 0);
     }
 }
 
diff --git a/sparse_strips/vello_cpu/src/render.rs b/sparse_strips/vello_cpu/src/render.rs
index fc09c54..176e0c0 100644
--- a/sparse_strips/vello_cpu/src/render.rs
+++ b/sparse_strips/vello_cpu/src/render.rs
@@ -836,7 +836,7 @@
             _ => Fill::NonZero,
         };
         self.dispatcher
-            .generate_wide_cmd(&adjusted_strips[start..end], fill_rule, paint, 0);
+            .generate_wide_cmd(&adjusted_strips[start..end], fill_rule, paint);
     }
 
     /// Prepare cached strips for rendering by adjusting indices.