commit 7600fc0e19c3a99bd3ef2c24515cc508ca1d3cfb
author David Neto <dneto@google.com> Wed Sep 05 15:42:21 2018 -0400
committer David Neto <dneto@google.com> Thu Sep 06 13:41:31 2018 -0400
tree 7abbe309a3da91f712d943423e016f6bda1d1f9d
parent 571251c8f807e199dbf18f109f7fdcf178c040a9

Update Dim capabilities

Corresponds to grammar changes for SPIR-V 1.3 Rev4.

test/operand_capabilities_test.cpp

diff --git a/test/operand_capabilities_test.cpp b/test/operand_capabilities_test.cpp
index 152cf5b..52ba71d 100644
--- a/test/operand_capabilities_test.cpp
+++ b/test/operand_capabilities_test.cpp
@@ -205,12 +205,12 @@
     Dim, EnumCapabilityTest,
     Combine(Values(SPV_ENV_UNIVERSAL_1_0, SPV_ENV_UNIVERSAL_1_1),
             ValuesIn(std::vector<EnumCapabilityCase>{
-                CASE1(DIMENSIONALITY, Dim1D, Sampled1D),
-                CASE0(DIMENSIONALITY, Dim2D),
+                CASE2(DIMENSIONALITY, Dim1D, Sampled1D, Image1D),
+                CASE3(DIMENSIONALITY, Dim2D, Kernel, Shader, ImageMSArray),
                 CASE0(DIMENSIONALITY, Dim3D),
-                CASE1(DIMENSIONALITY, DimCube, Shader),
-                CASE1(DIMENSIONALITY, DimRect, SampledRect),
-                CASE1(DIMENSIONALITY, DimBuffer, SampledBuffer),
+                CASE2(DIMENSIONALITY, DimCube, Shader, ImageCubeArray),
+                CASE2(DIMENSIONALITY, DimRect, SampledRect, ImageRect),
+                CASE2(DIMENSIONALITY, DimBuffer, SampledBuffer, ImageBuffer),
                 CASE1(DIMENSIONALITY, DimSubpassData, InputAttachment),
             })), );
 

test/operand_pattern_test.cpp

diff --git a/test/operand_pattern_test.cpp b/test/operand_pattern_test.cpp
index 851051b..d2d92a0 100644
--- a/test/operand_pattern_test.cpp
+++ b/test/operand_pattern_test.cpp
@@ -89,8 +89,9 @@
     ::testing::ValuesIn(std::vector<MaskExpansionCase>{
         // No bits means no change.
         {SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS, 0, {PREFIX0}, {PREFIX0}},
-        // Unknown bits means no change.  Use all bits that aren't in the grammar.
-	// The last mask enum is 0x20
+        // Unknown bits means no change.  Use all bits that aren't in the
+        // grammar.
+        // The last mask enum is 0x20
         {SPV_OPERAND_TYPE_OPTIONAL_MEMORY_ACCESS,
          0xffffffc0,
          {PREFIX1},

test/text_to_binary.extension_test.cpp

diff --git a/test/text_to_binary.extension_test.cpp b/test/text_to_binary.extension_test.cpp
index 7bed03d..5c0bf98 100644
--- a/test/text_to_binary.extension_test.cpp
+++ b/test/text_to_binary.extension_test.cpp
@@ -518,7 +518,10 @@
     // environments, and at least one specific environment.
     //
     // Note: SPV_KHR_vulkan_memory_model adds scope enum value QueueFamilyKHR.
-    // Scope enums are used in ID defini
+    // Scope enums are used in ID definitions elsewhere, that don't know they
+    // are using particular enums.  So the assembler doesn't support assembling
+    // those enums names into the corresponding values.  So there is no asm/dis
+    // tests for those enums.
     Combine(
         Values(SPV_ENV_UNIVERSAL_1_0, SPV_ENV_UNIVERSAL_1_1,
                SPV_ENV_UNIVERSAL_1_3, SPV_ENV_VULKAN_1_0, SPV_ENV_VULKAN_1_1),