diff --git a/readme.md b/readme.md
index 29866f8..5e52ac4 100644
--- a/readme.md
+++ b/readme.md
@@ -1,5 +1,5 @@
 
-# Xbyak 5.73 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
+# Xbyak 5.74 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
 
 ## Abstract
 
@@ -392,6 +392,7 @@
 http://opensource.org/licenses/BSD-3-Clause
 
 ## History
+* 2018/Oct/21 ver 5.74 support RegRip +/- int. Xbyak::CastTo is removed
 * 2018/Oct/15 util::AddressFrame uses push/pop instead of mov
 * 2018/Sep/19 ver 5.73 fix evex encoding of vpslld, vpslldq, vpsllw, etc for (reg, mem, imm8)
 * 2018/Sep/19 ver 5.72 fix the encoding of vinsertps for disp8N(Thanks to petercaday)
diff --git a/readme.txt b/readme.txt
index 3cc9b3d..420bb0e 100644
--- a/readme.txt
+++ b/readme.txt
@@ -1,5 +1,5 @@
 
-    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.73
+    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.74
 
 -----------------------------------------------------------------------------
 ◎概要
@@ -373,6 +373,7 @@
 -----------------------------------------------------------------------------
 ◎履歴
 
+2018/10/21 RegRip +/intの形をサポート Xbyak::CastToを削除
 2018/10/15 util::StackFrameでmovの代わりにpush/popを使う
 2018/09/19 ver 5.73 vpslld, vpslldq, vpsllwなどの(reg, mem, imm8)に対するevexエンコーディング修整
 2018/09/19 ver 5.72 fix the encoding of vinsertps for disp8N(Thanks to petercaday)
diff --git a/xbyak/xbyak.h b/xbyak/xbyak.h
index 679d24b..0b0d835 100644
--- a/xbyak/xbyak.h
+++ b/xbyak/xbyak.h
@@ -105,7 +105,7 @@
 
 enum {
 	DEFAULT_MAX_CODE_SIZE = 4096,
-	VERSION = 0x5730 /* 0xABCD = A.BC(D) */
+	VERSION = 0x5740 /* 0xABCD = A.BC(D) */
 };
 
 #ifndef MIE_INTEGER_TYPE_DEFINED
diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h
index 92a31f9..0dc268a 100644
--- a/xbyak/xbyak_mnemonic.h
+++ b/xbyak/xbyak_mnemonic.h
@@ -1,4 +1,4 @@
-const char *getVersionString() const { return "5.73"; }
+const char *getVersionString() const { return "5.74"; }
 void adc(const Operand& op, uint32 imm) { opRM_I(op, imm, 0x10, 2); }
 void adc(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x10); }
 void adcx(const Reg32e& reg, const Operand& op) { opGen(reg, op, 0xF6, 0x66, isREG32_REG32orMEM, NONE, 0x38); }