Merge branch 'dev'
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 4aae1af..a972c55 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.10)
-project(xbyak LANGUAGES CXX VERSION 7.24.1)
+project(xbyak LANGUAGES CXX VERSION 7.24.2)
file(GLOB headers xbyak/*.h)
diff --git a/doc/changelog.md b/doc/changelog.md
index 8cfb499..7a78495 100644
--- a/doc/changelog.md
+++ b/doc/changelog.md
@@ -1,5 +1,6 @@
# History
+* 2025/Mar/12 ver 7.24.2 fix. vcvtneps2bf16 should support AVX-NE-CONVERT (revert 749aa31)
* 2025/Feb/26 ver 7.24.1 fix 3-op shift APX instructions with NDD format.
* 2025/Feb/17 ver 7.24 feat: add error check for invalid REX prefix with AH/BH/CH/DH registers. enhance size mismatch detection for mem-reg operations like 'add eax, byte[rax]'
* 2025/Feb/07 ver 7.23.1 revert the behavior of StackFrame::close().
diff --git a/gen/gen_avx512.cpp b/gen/gen_avx512.cpp
index 293cb5b..a8b1bb7 100644
--- a/gen/gen_avx512.cpp
+++ b/gen/gen_avx512.cpp
@@ -687,7 +687,6 @@
{ 0x2A, "vcvtsi2sh", T_F3 | T_MAP5 | T_MUST_EVEX | T_ER_R | T_M_K, 6 },
{ 0x7B, "vcvtusi2sh", T_F3 | T_MAP5 | T_MUST_EVEX | T_ER_R | T_M_K, 6 },
- { 0x72, "vcvtneps2bf16", T_MUST_EVEX | T_F3 | T_0F38 | T_EW0 | T_YMM | T_SAE_Z | T_B32, 2 },
// 13.2
{ 0x6D, "vcvttpd2dqs", T_MUST_EVEX | T_YMM | T_MAP5 | T_EW1 | T_B64 | T_SAE_Y | T_SAE_Z, 2 },
// 13.4
diff --git a/gen/gen_code.cpp b/gen/gen_code.cpp
index db0d794..32ecf3e 100644
--- a/gen/gen_code.cpp
+++ b/gen/gen_code.cpp
@@ -1798,6 +1798,7 @@
const Tbl& p = tbl[i];
printf("void %s(const Xmm& x, const Address& addr) { opVex(x, 0, addr, %s, 0x%02X); }\n", p.name, type2String(p.type).c_str(), p.code);
}
+ printf("void vcvtneps2bf16(const Xmm& x, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opCvt2(x, op, %s|orEvexIf(encoding, 0, T_MUST_EVEX, 0), 0x72); }\n", type2String(T_F3 | T_0F38 | T_EW0 | T_YMM | T_SAE_Z | T_B32).c_str());
}
// haswell gpr(reg, reg, r/m)
{
diff --git a/meson.build b/meson.build
index 8120b4c..002dcd5 100644
--- a/meson.build
+++ b/meson.build
@@ -5,7 +5,7 @@
project(
'xbyak',
'cpp',
- version: '7.24.1',
+ version: '7.24.2',
license: 'BSD-3-Clause',
default_options: 'b_ndebug=if-release'
)
diff --git a/readme.md b/readme.md
index 09a110a..56f2d77 100644
--- a/readme.md
+++ b/readme.md
@@ -1,5 +1,5 @@
-# Xbyak 7.24.1 [![Badge Build]][Build Status]
+# Xbyak 7.24.2 [![Badge Build]][Build Status]
*A JIT assembler for x86/x64 architectures supporting advanced instruction sets up to AVX10.2*
diff --git a/readme.txt b/readme.txt
index ddc5e22..7575e7a 100644
--- a/readme.txt
+++ b/readme.txt
@@ -1,5 +1,5 @@
- C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.24.1
+ C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 7.24.2
-----------------------------------------------------------------------------
◎概要
@@ -404,6 +404,7 @@
-----------------------------------------------------------------------------
◎履歴
+2025/03/12 ver 7.24.2 vcvtneps2bf16はAVX-NE-CONVERTをサポートすべき(revert 749aa31)
2025/02/26 ver 7.24.1 NDD形式の3-opシフト命令のバグ修正
2025/02/17 ver 7.24 ahなどとREXプレフィクスの共用やadd eax, byte[rax]のようなサイズ不整合をエラーとする
2025/02/07 ver 7.23.1 StackFrame::close()の挙動を元に戻す
diff --git a/test/avx10/convert.txt b/test/avx10/convert.txt
index 836fcca..435f5e5 100644
--- a/test/avx10/convert.txt
+++ b/test/avx10/convert.txt
@@ -174,3 +174,27 @@
vcvtneph2hf8s(ymm1|k2|T_z, zmm2);
vcvtneph2hf8s(ymm1|k2|T_z, zword[rax+128]);
vcvtneph2hf8s(ymm1|k2|T_z, zword_b[rax+128]);
+
+// AVX-NE-CONVERT
+vbcstnebf162ps(xmm15, ptr[rax+128]);
+vbcstnebf162ps(xmm15, ptr[rax+128]);
+
+vbcstnesh2ps(ymm15, ptr[rax+128]);
+vbcstnesh2ps(ymm15, ptr[rax+128]);
+
+vcvtneebf162ps(xmm15, ptr[rax+128]);
+vcvtneebf162ps(ymm15, ptr[rax+128]);
+
+vcvtneeph2ps(xmm15, ptr[rax+128]);
+vcvtneeph2ps(ymm15, ptr[rax+128]);
+
+vcvtneobf162ps(xmm15, ptr[rax+128]);
+vcvtneobf162ps(ymm15, ptr[rax+128]);
+
+vcvtneoph2ps(xmm15, ptr[rax+128]);
+vcvtneoph2ps(ymm15, ptr[rax+128]);
+
+vcvtneps2bf16(xmm15, xmm3, VexEncoding);
+vcvtneps2bf16(xmm15, ptr[rax+128], VexEncoding);
+vcvtneps2bf16(xmm15, ymm3, VexEncoding);
+vcvtneps2bf16(xmm15, ptr[rax+128], VexEncoding);
diff --git a/test/misc.cpp b/test/misc.cpp
index dcdbfec..8272480 100644
--- a/test/misc.cpp
+++ b/test/misc.cpp
@@ -838,6 +838,12 @@
vdpbf16ps(xmm0 | k1, xmm1, ptr [rax + 64]);
vdpbf16ps(ymm0 | k1, ymm1, ptr [rax + 64]);
vdpbf16ps(zmm0 | k1, zmm1, ptr [rax + 64]);
+
+ // AVX_NE_CONVERT
+ vcvtneps2bf16(xmm15, xmm2, VexEncoding);
+ vcvtneps2bf16(xmm15, xword[rax], VexEncoding);
+ vcvtneps2bf16(xmm15, ymm2, VexEncoding);
+ vcvtneps2bf16(xmm15, yword[rax], VexEncoding);
}
} c;
const uint8_t tbl[] = {
@@ -853,6 +859,11 @@
0x62, 0xf2, 0x76, 0x09, 0x52, 0x40, 0x04,
0x62, 0xf2, 0x76, 0x29, 0x52, 0x40, 0x02,
0x62, 0xf2, 0x76, 0x49, 0x52, 0x40, 0x01,
+
+ 0xc4, 0x62, 0x7a, 0x72, 0xfa,
+ 0xc4, 0x62, 0x7a, 0x72, 0x38,
+ 0xc4, 0x62, 0x7e, 0x72, 0xfa,
+ 0xc4, 0x62, 0x7e, 0x72, 0x38,
};
const size_t n = sizeof(tbl) / sizeof(tbl[0]);
CYBOZU_TEST_EQUAL(c.getSize(), n);
diff --git a/xbyak/xbyak.h b/xbyak/xbyak.h
index 4615b3f..507c012 100644
--- a/xbyak/xbyak.h
+++ b/xbyak/xbyak.h
@@ -155,7 +155,7 @@
enum {
DEFAULT_MAX_CODE_SIZE = 4096,
- VERSION = 0x7241 /* 0xABCD = A.BC(.D) */
+ VERSION = 0x7242 /* 0xABCD = A.BC(.D) */
};
#ifndef MIE_INTEGER_TYPE_DEFINED
diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h
index 5b9b4ce..9aac078 100644
--- a/xbyak/xbyak_mnemonic.h
+++ b/xbyak/xbyak_mnemonic.h
@@ -1,4 +1,4 @@
-const char *getVersionString() const { return "7.24.1"; }
+const char *getVersionString() const { return "7.24.2"; }
void aadd(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); }
void aand(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); }
void adc(const Operand& op, uint32_t imm) { opOI(op, imm, 0x10, 2); }
@@ -1212,6 +1212,7 @@
void vcvtneeph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM, 0xB0); }
void vcvtneobf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F2|T_0F38|T_W0|T_YMM, 0xB0); }
void vcvtneoph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_0F38|T_W0|T_YMM, 0xB0); }
+void vcvtneps2bf16(const Xmm& x, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opCvt2(x, op, T_F3|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32|orEvexIf(encoding, 0, T_MUST_EVEX, 0), 0x72); }
void vcvtpd2dq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_F2 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0xE6); }
void vcvtpd2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_66 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0x5A); }
void vcvtph2ps(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F38 | T_66 | T_W0 | T_EVEX | T_EW0 | T_N8 | T_N_VL | T_SAE_Y, 0x13); }
@@ -2205,7 +2206,6 @@
void vcvtneph2bf8s(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_EW0|T_YMM|T_MUST_EVEX|T_B16, 0x74); }
void vcvtneph2hf8(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_EW0|T_YMM|T_MUST_EVEX|T_B16, 0x18); }
void vcvtneph2hf8s(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_MAP5|T_EW0|T_YMM|T_MUST_EVEX|T_B16, 0x1B); }
-void vcvtneps2bf16(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F3|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x72); }
void vcvtpd2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5A); }
void vcvtpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7B); }
void vcvtpd2udq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); }
