diff --git a/readme.md b/readme.md
index a67e8e9..d0587b6 100644
--- a/readme.md
+++ b/readme.md
@@ -1,6 +1,6 @@
 [![Build Status](https://github.com/herumi/xbyak/actions/workflows/main.yml/badge.svg)](https://github.com/herumi/xbyak/actions/workflows/main.yml)
 
-# Xbyak 5.992 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
+# Xbyak 5.993 ; JIT assembler for x86(IA32), x64(AMD64, x86-64) by C++
 
 ## Abstract
 
@@ -446,6 +446,7 @@
 http://opensource.org/licenses/BSD-3-Clause
 
 ## History
+* 2021/Jun/06 ver 5.993 strict check of gather/scatter register combination
 * 2021/May/09 ver 5.992 support endbr32 and endbr64
 * 2020/Nov/16 ver 5.991 disable constexpr for gcc-5 with -std=c++-14
 * 2020/Oct/19 ver 5.99 support VNNI instructions(Thanks to akharito)
diff --git a/readme.txt b/readme.txt
index 822d665..3fd57b0 100644
--- a/readme.txt
+++ b/readme.txt
@@ -1,5 +1,5 @@
 
-    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.992
+    C++用x86(IA-32), x64(AMD64, x86-64) JITアセンブラ Xbyak 5.993
 
 -----------------------------------------------------------------------------
 ◎概要
@@ -382,6 +382,7 @@
 -----------------------------------------------------------------------------
 ◎履歴
 
+2021/06/06 ver 5.993 gather/scatterのレジスタの組み合わせの厳密なチェック
 2021/05/09 ver 5.992 endbr32とendbr64のサポート
 2020/11/16 ver 5.991 g++-5のC++14でconstexpr機能の抑制
 2020/10/19 ver 5.99 VNNI命令サポート(Thanks to akharito)
diff --git a/xbyak/xbyak.h b/xbyak/xbyak.h
index 139f3d3..953674c 100644
--- a/xbyak/xbyak.h
+++ b/xbyak/xbyak.h
@@ -138,7 +138,7 @@
 
 enum {
 	DEFAULT_MAX_CODE_SIZE = 4096,
-	VERSION = 0x5992 /* 0xABCD = A.BC(D) */
+	VERSION = 0x5993 /* 0xABCD = A.BC(D) */
 };
 
 #ifndef MIE_INTEGER_TYPE_DEFINED
diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h
index be9bbbf..9392afd 100644
--- a/xbyak/xbyak_mnemonic.h
+++ b/xbyak/xbyak_mnemonic.h
@@ -1,4 +1,4 @@
-const char *getVersionString() const { return "5.992"; }
+const char *getVersionString() const { return "5.993"; }
 void adc(const Operand& op, uint32_t imm) { opRM_I(op, imm, 0x10, 2); }
 void adc(const Operand& op1, const Operand& op2) { opRM_RM(op1, op2, 0x10); }
 void adcx(const Reg32e& reg, const Operand& op) { opGen(reg, op, 0xF6, 0x66, isREG32_REG32orMEM, NONE, 0x38); }