| 369 instructions |
| |
| [immutable slots] |
| i0 = 0xFFFFFFFF |
| i1 = 0 |
| |
| store_src_rg coords = src.rg |
| init_lane_masks CondMask = LoopMask = RetMask = true |
| copy_uniform $0 = colorGreen(0) |
| copy_uniform $1 = colorGreen(2) |
| div_float $0 /= $1 |
| copy_slot_unmasked NAN1 = $0 |
| copy_uniform $0 = colorGreen(2) |
| copy_uniform $1 = colorGreen(0) |
| div_float $0 /= $1 |
| copy_slot_unmasked NAN2 = $0 |
| copy_uniform $0 = colorGreen(0) |
| copy_uniform $1 = colorGreen(2) |
| mul_float $0 *= $1 |
| copy_slot_unmasked ZP = $0 |
| copy_uniform $0 = colorGreen(0) |
| bitwise_xor_imm_int $0 ^= 0x80000000 |
| copy_uniform $1 = colorGreen(2) |
| mul_float $0 *= $1 |
| copy_slot_unmasked ZM = $0 |
| copy_uniform $0 = colorGreen(1) |
| mul_imm_float $0 *= 0x42280000 (42.0) |
| copy_slot_unmasked F42 = $0 |
| copy_uniform $0 = colorGreen(1) |
| mul_imm_float $0 *= 0x422C0000 (43.0) |
| copy_slot_unmasked F43 = $0 |
| copy_uniform $0 = colorGreen(1) |
| mul_imm_float $0 *= 0x42300000 (44.0) |
| copy_slot_unmasked F44 = $0 |
| copy_uniform $0 = colorGreen(1) |
| mul_imm_float $0 *= 0x42340000 (45.0) |
| copy_slot_unmasked F45 = $0 |
| copy_uniform $0 = colorGreen(0) |
| add_imm_float $0 += 0x3F800000 (1.0) |
| copy_slot_unmasked _0_one = $0 |
| copy_slot_unmasked _1_a(0) = F42 |
| copy_slot_unmasked _1_a(1) = ZM |
| copy_slot_unmasked _1_a(2) = ZP |
| copy_slot_unmasked _1_a(3) = F43 |
| copy_slot_unmasked $0 = F42 |
| copy_slot_unmasked $1 = _0_one |
| mul_float $0 *= $1 |
| copy_slot_unmasked $1 = ZM |
| copy_slot_unmasked $2 = _0_one |
| mul_float $1 *= $2 |
| copy_slot_unmasked $2 = ZP |
| copy_slot_unmasked $3 = _0_one |
| mul_float $2 *= $3 |
| copy_slot_unmasked $3 = F43 |
| copy_slot_unmasked $4 = _0_one |
| mul_float $3 *= $4 |
| copy_4_slots_unmasked _2_b = $0..3 |
| store_condition_mask $12 = CondMask |
| store_condition_mask $23 = CondMask |
| store_condition_mask $34 = CondMask |
| store_condition_mask $45 = CondMask |
| store_condition_mask $56 = CondMask |
| store_condition_mask $67 = CondMask |
| store_condition_mask $78 = CondMask |
| store_condition_mask $88 = CondMask |
| copy_constant $89 = 0xFFFFFFFF |
| copy_4_slots_unmasked $79..82 = _1_a |
| copy_4_slots_unmasked $83..86 = _2_b |
| cmpne_4_floats $79..82 = notEqual($79..82, $83..86) |
| bitwise_or_2_ints $79..80 |= $81..82 |
| bitwise_or_int $79 |= $80 |
| merge_condition_mask CondMask = $88 & $89 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 8 at #74) |
| copy_4_slots_unmasked $80..83 = _1_a |
| copy_4_slots_unmasked $84..87 = _2_b |
| cmpeq_4_floats $80..83 = equal($80..83, $84..87) |
| bitwise_and_2_ints $80..81 &= $82..83 |
| bitwise_and_int $80 &= $81 |
| copy_slot_masked $79 = Mask($80) |
| label label 0x00000008 |
| load_condition_mask CondMask = $88 |
| copy_constant $68 = 0 |
| merge_condition_mask CondMask = $78 & $79 |
| branch_if_no_lanes_active branch_if_no_lanes_active +42 (label 7 at #120) |
| copy_constant eq = 0 |
| copy_uniform $69 = colorGreen(0) |
| add_imm_float $69 += 0x3F800000 (1.0) |
| copy_slot_unmasked one = $69 |
| copy_slot_unmasked a(0) = F42 |
| copy_slot_unmasked a(1) = ZM |
| copy_slot_unmasked a(2) = ZP |
| copy_slot_unmasked a(3) = F43 |
| copy_slot_unmasked $69 = F42 |
| copy_slot_unmasked $70 = one |
| mul_float $69 *= $70 |
| copy_slot_unmasked $70 = ZM |
| copy_slot_unmasked $71 = one |
| mul_float $70 *= $71 |
| copy_slot_unmasked $71 = ZP |
| copy_slot_unmasked $72 = one |
| mul_float $71 *= $72 |
| copy_slot_unmasked $72 = F43 |
| copy_slot_unmasked $73 = one |
| mul_float $72 *= $73 |
| copy_4_slots_unmasked b = $69..72 |
| store_condition_mask $88 = CondMask |
| copy_slot_unmasked $89 = eq |
| copy_4_slots_unmasked $69..72 = a |
| copy_4_slots_unmasked $73..76 = b |
| cmpne_4_floats $69..72 = notEqual($69..72, $73..76) |
| bitwise_or_2_ints $69..70 |= $71..72 |
| bitwise_or_int $69 |= $70 |
| merge_condition_mask CondMask = $88 & $89 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 10 at #115) |
| copy_4_slots_unmasked $70..73 = a |
| copy_4_slots_unmasked $74..77 = b |
| cmpeq_4_floats $70..73 = equal($70..73, $74..77) |
| bitwise_and_2_ints $70..71 &= $72..73 |
| bitwise_and_int $70 &= $71 |
| copy_slot_masked $69 = Mask($70) |
| label label 0x0000000A |
| load_condition_mask CondMask = $88 |
| label label 0x00000009 |
| bitwise_xor_imm_int $69 ^= 0xFFFFFFFF |
| copy_slot_masked $68 = Mask($69) |
| label label 0x00000007 |
| load_condition_mask CondMask = $78 |
| copy_constant $57 = 0 |
| merge_condition_mask CondMask = $67 & $68 |
| branch_if_no_lanes_active branch_if_no_lanes_active +40 (label 6 at #164) |
| copy_constant eq = 0 |
| copy_uniform $58 = colorGreen(0) |
| add_imm_float $58 += 0x3F800000 (1.0) |
| copy_slot_unmasked one = $58 |
| copy_slot_unmasked a(0) = F42 |
| copy_2_slots_unmasked a(1..2) = NAN1, NAN2 |
| copy_slot_unmasked a(3) = F43 |
| copy_slot_unmasked $58 = F42 |
| copy_slot_unmasked $59 = one |
| mul_float $58 *= $59 |
| copy_slot_unmasked $59 = NAN1 |
| copy_slot_unmasked $60 = one |
| mul_float $59 *= $60 |
| copy_slot_unmasked $60 = NAN2 |
| copy_slot_unmasked $61 = one |
| mul_float $60 *= $61 |
| copy_slot_unmasked $61 = F43 |
| copy_slot_unmasked $62 = one |
| mul_float $61 *= $62 |
| copy_4_slots_unmasked b = $58..61 |
| store_condition_mask $78 = CondMask |
| copy_slot_unmasked $79 = eq |
| copy_4_slots_unmasked $58..61 = a |
| copy_4_slots_unmasked $62..65 = b |
| cmpne_4_floats $58..61 = notEqual($58..61, $62..65) |
| bitwise_or_2_ints $58..59 |= $60..61 |
| bitwise_or_int $58 |= $59 |
| merge_condition_mask CondMask = $78 & $79 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 12 at #160) |
| copy_4_slots_unmasked $59..62 = a |
| copy_4_slots_unmasked $63..66 = b |
| cmpeq_4_floats $59..62 = equal($59..62, $63..66) |
| bitwise_and_2_ints $59..60 &= $61..62 |
| bitwise_and_int $59 &= $60 |
| copy_slot_masked $58 = Mask($59) |
| label label 0x0000000C |
| load_condition_mask CondMask = $78 |
| label label 0x0000000B |
| copy_slot_masked $57 = Mask($58) |
| label label 0x00000006 |
| load_condition_mask CondMask = $67 |
| copy_constant $46 = 0 |
| merge_condition_mask CondMask = $56 & $57 |
| branch_if_no_lanes_active branch_if_no_lanes_active +41 (label 5 at #209) |
| copy_constant eq = 0xFFFFFFFF |
| copy_uniform $47 = colorGreen(0) |
| add_imm_float $47 += 0x3F800000 (1.0) |
| copy_slot_unmasked one = $47 |
| copy_slot_unmasked a(0) = F42 |
| copy_2_slots_unmasked a(1..2) = NAN1, NAN2 |
| copy_slot_unmasked a(3) = F43 |
| copy_slot_unmasked $47 = F42 |
| copy_slot_unmasked $48 = one |
| mul_float $47 *= $48 |
| copy_slot_unmasked $48 = NAN1 |
| copy_slot_unmasked $49 = one |
| mul_float $48 *= $49 |
| copy_slot_unmasked $49 = NAN2 |
| copy_slot_unmasked $50 = one |
| mul_float $49 *= $50 |
| copy_slot_unmasked $50 = F43 |
| copy_slot_unmasked $51 = one |
| mul_float $50 *= $51 |
| copy_4_slots_unmasked b = $47..50 |
| store_condition_mask $67 = CondMask |
| copy_slot_unmasked $68 = eq |
| copy_4_slots_unmasked $47..50 = a |
| copy_4_slots_unmasked $51..54 = b |
| cmpne_4_floats $47..50 = notEqual($47..50, $51..54) |
| bitwise_or_2_ints $47..48 |= $49..50 |
| bitwise_or_int $47 |= $48 |
| merge_condition_mask CondMask = $67 & $68 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 14 at #204) |
| copy_4_slots_unmasked $48..51 = a |
| copy_4_slots_unmasked $52..55 = b |
| cmpeq_4_floats $48..51 = equal($48..51, $52..55) |
| bitwise_and_2_ints $48..49 &= $50..51 |
| bitwise_and_int $48 &= $49 |
| copy_slot_masked $47 = Mask($48) |
| label label 0x0000000E |
| load_condition_mask CondMask = $67 |
| label label 0x0000000D |
| bitwise_xor_imm_int $47 ^= 0xFFFFFFFF |
| copy_slot_masked $46 = Mask($47) |
| label label 0x00000005 |
| load_condition_mask CondMask = $56 |
| copy_constant $35 = 0 |
| merge_condition_mask CondMask = $45 & $46 |
| branch_if_no_lanes_active branch_if_no_lanes_active +38 (label 4 at #251) |
| copy_constant eq₁ = 0 |
| copy_uniform $36 = colorGreen(0) |
| add_imm_float $36 += 0x40000000 (2.0) |
| copy_slot_unmasked two = $36 |
| copy_4_slots_unmasked a₁ = F42, F43, F44, F45 |
| copy_slot_unmasked $36 = F42 |
| copy_slot_unmasked $37 = two |
| mul_float $36 *= $37 |
| copy_slot_unmasked $37 = F43 |
| copy_slot_unmasked $38 = two |
| mul_float $37 *= $38 |
| copy_slot_unmasked $38 = F44 |
| copy_slot_unmasked $39 = two |
| mul_float $38 *= $39 |
| copy_slot_unmasked $39 = F45 |
| copy_slot_unmasked $40 = two |
| mul_float $39 *= $40 |
| copy_4_slots_unmasked b₁ = $36..39 |
| store_condition_mask $56 = CondMask |
| copy_slot_unmasked $57 = eq₁ |
| copy_4_slots_unmasked $36..39 = a₁ |
| copy_4_slots_unmasked $40..43 = b₁ |
| cmpne_4_floats $36..39 = notEqual($36..39, $40..43) |
| bitwise_or_2_ints $36..37 |= $38..39 |
| bitwise_or_int $36 |= $37 |
| merge_condition_mask CondMask = $56 & $57 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 16 at #247) |
| copy_4_slots_unmasked $37..40 = a₁ |
| copy_4_slots_unmasked $41..44 = b₁ |
| cmpeq_4_floats $37..40 = equal($37..40, $41..44) |
| bitwise_and_2_ints $37..38 &= $39..40 |
| bitwise_and_int $37 &= $38 |
| copy_slot_masked $36 = Mask($37) |
| label label 0x00000010 |
| load_condition_mask CondMask = $56 |
| label label 0x0000000F |
| copy_slot_masked $35 = Mask($36) |
| label label 0x00000004 |
| load_condition_mask CondMask = $45 |
| copy_constant $24 = 0 |
| merge_condition_mask CondMask = $34 & $35 |
| branch_if_no_lanes_active branch_if_no_lanes_active +39 (label 3 at #294) |
| copy_constant eq₁ = 0xFFFFFFFF |
| copy_uniform $25 = colorGreen(0) |
| add_imm_float $25 += 0x40000000 (2.0) |
| copy_slot_unmasked two = $25 |
| copy_4_slots_unmasked a₁ = F42, F43, F44, F45 |
| copy_slot_unmasked $25 = F42 |
| copy_slot_unmasked $26 = two |
| mul_float $25 *= $26 |
| copy_slot_unmasked $26 = F43 |
| copy_slot_unmasked $27 = two |
| mul_float $26 *= $27 |
| copy_slot_unmasked $27 = F44 |
| copy_slot_unmasked $28 = two |
| mul_float $27 *= $28 |
| copy_slot_unmasked $28 = F45 |
| copy_slot_unmasked $29 = two |
| mul_float $28 *= $29 |
| copy_4_slots_unmasked b₁ = $25..28 |
| store_condition_mask $45 = CondMask |
| copy_slot_unmasked $46 = eq₁ |
| copy_4_slots_unmasked $25..28 = a₁ |
| copy_4_slots_unmasked $29..32 = b₁ |
| cmpne_4_floats $25..28 = notEqual($25..28, $29..32) |
| bitwise_or_2_ints $25..26 |= $27..28 |
| bitwise_or_int $25 |= $26 |
| merge_condition_mask CondMask = $45 & $46 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 18 at #289) |
| copy_4_slots_unmasked $26..29 = a₁ |
| copy_4_slots_unmasked $30..33 = b₁ |
| cmpeq_4_floats $26..29 = equal($26..29, $30..33) |
| bitwise_and_2_ints $26..27 &= $28..29 |
| bitwise_and_int $26 &= $27 |
| copy_slot_masked $25 = Mask($26) |
| label label 0x00000012 |
| load_condition_mask CondMask = $45 |
| label label 0x00000011 |
| bitwise_xor_imm_int $25 ^= 0xFFFFFFFF |
| copy_slot_masked $24 = Mask($25) |
| label label 0x00000003 |
| load_condition_mask CondMask = $34 |
| copy_constant $13 = 0 |
| merge_condition_mask CondMask = $23 & $24 |
| branch_if_no_lanes_active branch_if_no_lanes_active +41 (label 2 at #339) |
| copy_constant eq₁ = 0 |
| copy_uniform $14 = colorGreen(0) |
| add_imm_float $14 += 0x40000000 (2.0) |
| copy_slot_unmasked two = $14 |
| copy_slot_unmasked a₁(0) = NAN1 |
| copy_slot_unmasked a₁(1) = ZM |
| copy_slot_unmasked a₁(2) = ZP |
| copy_slot_unmasked a₁(3) = F42 |
| copy_slot_unmasked $14 = NAN1 |
| copy_slot_unmasked $15 = two |
| mul_float $14 *= $15 |
| copy_slot_unmasked $15 = ZM |
| copy_slot_unmasked $16 = two |
| mul_float $15 *= $16 |
| copy_slot_unmasked $16 = ZP |
| copy_slot_unmasked $17 = two |
| mul_float $16 *= $17 |
| copy_slot_unmasked $17 = F42 |
| copy_slot_unmasked $18 = two |
| mul_float $17 *= $18 |
| copy_4_slots_unmasked b₁ = $14..17 |
| store_condition_mask $34 = CondMask |
| copy_slot_unmasked $35 = eq₁ |
| copy_4_slots_unmasked $14..17 = a₁ |
| copy_4_slots_unmasked $18..21 = b₁ |
| cmpne_4_floats $14..17 = notEqual($14..17, $18..21) |
| bitwise_or_2_ints $14..15 |= $16..17 |
| bitwise_or_int $14 |= $15 |
| merge_condition_mask CondMask = $34 & $35 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 20 at #335) |
| copy_4_slots_unmasked $15..18 = a₁ |
| copy_4_slots_unmasked $19..22 = b₁ |
| cmpeq_4_floats $15..18 = equal($15..18, $19..22) |
| bitwise_and_2_ints $15..16 &= $17..18 |
| bitwise_and_int $15 &= $16 |
| copy_slot_masked $14 = Mask($15) |
| label label 0x00000014 |
| load_condition_mask CondMask = $34 |
| label label 0x00000013 |
| copy_slot_masked $13 = Mask($14) |
| label label 0x00000002 |
| load_condition_mask CondMask = $23 |
| copy_constant $0 = 0 |
| merge_condition_mask CondMask = $12 & $13 |
| branch_if_no_lanes_active branch_if_no_lanes_active +42 (label 1 at #385) |
| copy_constant eq₁ = 0xFFFFFFFF |
| copy_uniform $1 = colorGreen(0) |
| add_imm_float $1 += 0x40000000 (2.0) |
| copy_slot_unmasked two = $1 |
| copy_slot_unmasked a₁(0) = NAN1 |
| copy_slot_unmasked a₁(1) = ZM |
| copy_slot_unmasked a₁(2) = ZP |
| copy_slot_unmasked a₁(3) = F42 |
| copy_slot_unmasked $1 = NAN1 |
| copy_slot_unmasked $2 = two |
| mul_float $1 *= $2 |
| copy_slot_unmasked $2 = ZM |
| copy_slot_unmasked $3 = two |
| mul_float $2 *= $3 |
| copy_slot_unmasked $3 = ZP |
| copy_slot_unmasked $4 = two |
| mul_float $3 *= $4 |
| copy_slot_unmasked $4 = F42 |
| copy_slot_unmasked $5 = two |
| mul_float $4 *= $5 |
| copy_4_slots_unmasked b₁ = $1..4 |
| store_condition_mask $23 = CondMask |
| copy_slot_unmasked $24 = eq₁ |
| copy_4_slots_unmasked $1..4 = a₁ |
| copy_4_slots_unmasked $5..8 = b₁ |
| cmpne_4_floats $1..4 = notEqual($1..4, $5..8) |
| bitwise_or_2_ints $1..2 |= $3..4 |
| bitwise_or_int $1 |= $2 |
| merge_condition_mask CondMask = $23 & $24 |
| branch_if_no_lanes_active branch_if_no_lanes_active +7 (label 22 at #380) |
| copy_4_slots_unmasked $2..5 = a₁ |
| copy_4_slots_unmasked $6..9 = b₁ |
| cmpeq_4_floats $2..5 = equal($2..5, $6..9) |
| bitwise_and_2_ints $2..3 &= $4..5 |
| bitwise_and_int $2 &= $3 |
| copy_slot_masked $1 = Mask($2) |
| label label 0x00000016 |
| load_condition_mask CondMask = $23 |
| label label 0x00000015 |
| bitwise_xor_imm_int $1 ^= 0xFFFFFFFF |
| copy_slot_masked $0 = Mask($1) |
| label label 0x00000001 |
| load_condition_mask CondMask = $12 |
| swizzle_4 $0..3 = ($0..3).xxxx |
| copy_4_uniforms $4..7 = colorRed |
| copy_4_uniforms $8..11 = colorGreen |
| mix_4_ints $0..3 = mix($4..7, $8..11, $0..3) |
| load_src src.rgba = $0..3 |
