)]}'
{
  "commit": "1dc33e4df6f757c363dfe84713808e62e65aee84",
  "tree": "2666f5373b24b72f1b83be65a738a40bf68d84c6",
  "parents": [
    "f5bdd2459caec2ad239e5693b826084b45f8d478"
  ],
  "author": {
    "name": "Connal de Souza",
    "email": "connaldesouza@google.com",
    "time": "Fri Oct 30 10:25:19 2026 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Fri Oct 30 10:32:45 2026 -0700"
  },
  "message": "Prefetch destination cache lines in ExtendWithPclmul temporal copy mode.\nWe can only prefetch on x86 and in temporal mode because both in non-temporal mode and on aarch64, writes to full cachelines are streamed to lower level caches or DRAM, and prefetching them actually causes more installations and hurts performance.\n\nAlso reduce the number of copy streams to 2, which helps performance slightly overall.\n\nPiperOrigin-RevId: 1010616216\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2d68cebb1ede8391c81ba6bd09f9c407ee4252ff",
      "old_mode": 33188,
      "old_path": "absl/crc/internal/crc_x86_arm_combined.cc",
      "new_id": "0d1dfdc7f7cff22ce6104c99e504872bc4a7300e",
      "new_mode": 33188,
      "new_path": "absl/crc/internal/crc_x86_arm_combined.cc"
    }
  ]
}