)]}'
{
  "commit": "4303d296b0c92a4eb0ebbe7cddbf63e3e2d29d19",
  "tree": "1f3f9e4cea2ec5a7746ef6386d7032d789596c81",
  "parents": [
    "8c4d532bceb3e56952c1cb83b8a40e7f18f0cbbf"
  ],
  "author": {
    "name": "Evan Brown",
    "email": "ezb@google.com",
    "time": "Tue Oct 20 09:19:33 2026 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Tue Oct 20 11:10:24 2026 -0700"
  },
  "message": "Use bit-shift extraction in `HashtableInlineData::read_byte` on non-x86 targets.\n\nReading `capacity` and `seed` through `reinterpret_cast\u003cconst unsigned char*\u003e(\u0026data_)[index]` allows x86 compilers to emit `movzbl` byte loads without masking on the lookup critical path. On AArch64, however, accessing `data_` via narrow byte loads prevents the compiler from coalescing the `inline_data_` and `control_` loads into a single `ldp` instruction, forces separate `ldrb` + `ldrb` + `ldr` loads when `empty()` or `size()` also inspects `data_`, and causes store-to-load forwarding stalls when a byte load follows a 64-bit store to `data_`.\n\nRestrict the `unsigned char` byte-load path in `HashtableInlineData::read_byte` to x86 targets and extract the requested byte via bit shifts on `data_` on other architectures. This preserves byte-identical x86 codegen while restoring wide `ldr`/`ldp` loads and `ubfx` extraction on AArch64 without changing the bit layout of `HashtableInlineData::data_`.\n\nPiperOrigin-RevId: 1003158224\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "83b547e83283113a448c19ef8fb51e5982e7a1a6",
      "old_mode": 33188,
      "old_path": "absl/container/internal/raw_hash_set.h",
      "new_id": "4d76862e95af922cbcf48604c54014cdf4a7c404",
      "new_mode": 33188,
      "new_path": "absl/container/internal/raw_hash_set.h"
    }
  ]
}