)]}'
{
  "commit": "ca649d15535a6029697b6c339590bd155fa6528f",
  "tree": "dffe1cfef58d71079daac721a01253277159d0b6",
  "parents": [
    "dd142e777635ca7c0b8eb01a46fdd9635f7d1255"
  ],
  "author": {
    "name": "Connal de Souza",
    "email": "connaldesouza@google.com",
    "time": "Fri Oct 16 11:28:25 2026 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Fri Oct 16 11:29:49 2026 -0700"
  },
  "message": "Interleave CRC32 and PCLMUL stream operations at 16-byte granularity.\n\nSplit 64-byte PCLMUL, VPCLMUL, and CRC32 stream helpers into 16-byte (and\n32-byte VPCLMUL) building blocks and introduce ProcessAllStreams16 to interleave 8B CRC -\u003e PCLMUL -\u003e 8B CRC -\u003e XOR across all active CRC and PCLMUL streams.\n\nThis gives a small performance improvement across all tested platforms. Further performance improvments are possible with follow up changes that will\n1) Extend the parallelized portion of the input stream with this new smaller block size so that the slower tail is shorter, and\n2) Retune the stream counts. A large number of streams is beneficial after the previous two changes.\n\nPiperOrigin-RevId: 1000986346\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d6f42d9a4c07d39b519dae828247f18a9c6e4003",
      "old_mode": 33188,
      "old_path": "absl/crc/internal/crc_x86_arm_combined.cc",
      "new_id": "5cb6ccafe02dcd730e0efa3e2b1a4791b670dc56",
      "new_mode": 33188,
      "new_path": "absl/crc/internal/crc_x86_arm_combined.cc"
    }
  ]
}