diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index b21bb88..5461912 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -10114,6 +10114,15 @@
           ],
           "capabilities" : [ "FPGAKernelAttributesINTEL" ],
           "version" : "None"
+        },
+        {
+          "enumerant" : "NamedBarrierCountINTEL",
+          "value" : 6417,
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Barrier Count'" }
+          ],
+          "capabilities" : [ "VectorComputeINTEL" ],
+          "version" : "None"
         }
       ]
     },
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index ca4b0b2..12431fc 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -177,6 +177,7 @@
             NoGlobalOffsetINTEL = 5895,
             NumSIMDWorkitemsINTEL = 5896,
             SchedulerTargetFmaxMhzINTEL = 5903,
+            NamedBarrierCountINTEL = 6417,
         }
 
         public enum StorageClass
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index f66bc15..02aec1f 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -185,6 +185,7 @@
     SpvExecutionModeNoGlobalOffsetINTEL = 5895,
     SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
     SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+    SpvExecutionModeNamedBarrierCountINTEL = 6417,
     SpvExecutionModeMax = 0x7fffffff,
 } SpvExecutionMode;
 
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 7f746db..9f99eca 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -181,6 +181,7 @@
     ExecutionModeNoGlobalOffsetINTEL = 5895,
     ExecutionModeNumSIMDWorkitemsINTEL = 5896,
     ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
+    ExecutionModeNamedBarrierCountINTEL = 6417,
     ExecutionModeMax = 0x7fffffff,
 };
 
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index ce04196..8e0b845 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -181,6 +181,7 @@
     NoGlobalOffsetINTEL = 5895,
     NumSIMDWorkitemsINTEL = 5896,
     SchedulerTargetFmaxMhzINTEL = 5903,
+    NamedBarrierCountINTEL = 6417,
     Max = 0x7fffffff,
 };
 
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 8475389..baa9345 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -199,7 +199,8 @@
                     "MaxWorkDimINTEL": 5894,
                     "NoGlobalOffsetINTEL": 5895,
                     "NumSIMDWorkitemsINTEL": 5896,
-                    "SchedulerTargetFmaxMhzINTEL": 5903
+                    "SchedulerTargetFmaxMhzINTEL": 5903,
+                    "NamedBarrierCountINTEL": 6417
                 }
             },
             {
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 39d086c..3812806 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -168,6 +168,7 @@
         NoGlobalOffsetINTEL = 5895,
         NumSIMDWorkitemsINTEL = 5896,
         SchedulerTargetFmaxMhzINTEL = 5903,
+        NamedBarrierCountINTEL = 6417,
     },
 
     StorageClass = {
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index a6d785e..8aa9490 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -168,6 +168,7 @@
         'NoGlobalOffsetINTEL' : 5895,
         'NumSIMDWorkitemsINTEL' : 5896,
         'SchedulerTargetFmaxMhzINTEL' : 5903,
+        'NamedBarrierCountINTEL' : 6417,
     },
 
     'StorageClass' : {
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index 978cfdd..0c9c164 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -180,6 +180,7 @@
     NoGlobalOffsetINTEL = 5895,
     NumSIMDWorkitemsINTEL = 5896,
     SchedulerTargetFmaxMhzINTEL = 5903,
+    NamedBarrierCountINTEL = 6417,
 }
 
 enum StorageClass : uint