Merge pull request #250 from kpet/clspv-reflection-subgroups
Add SpecConstantSubgroupMaxSize to the clspv reflection non-semantic instruction set
diff --git a/include/spirv/spir-v.xml b/include/spirv/spir-v.xml
index 525c97d..34453f8 100644
--- a/include/spirv/spir-v.xml
+++ b/include/spirv/spir-v.xml
@@ -81,7 +81,8 @@
<id value="28" vendor="gfx-rs community" tool="Naga" comment="https://github.com/gfx-rs/naga"/>
<id value="29" vendor="Mikkosoft Productions" tool="MSP Shader Compiler" comment="Contact Mikko Rasa, tdb@tdb.fi"/>
<id value="30" vendor="SpvGenTwo community" tool="SpvGenTwo SPIR-V IR Tools" comment="https://github.com/rAzoR8/SpvGenTwo"/>
- <unused start="31" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
+ <id value="31" vendor="Google" tool="Skia SkSL" comment="Contact Ethan Nicholas, ethannicholas@google.com"/>
+ <unused start="32" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
</ids>
<!-- SECTION: SPIR-V Opcodes and Enumerants -->
@@ -133,13 +134,14 @@
<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="opcode" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/>
+ <ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
<!-- Opcode enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
- <ids type="opcode" start="6400" end="65535" comment="Opcode range reservable for future use by vendors"/>
+ <ids type="opcode" start="6464" end="65535" comment="Opcode range reservable for future use by vendors"/>
<!-- End reservations of opcodes -->
@@ -161,13 +163,14 @@
<ids type="enumerant" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
<ids type="enumerant" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="enumerant" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/>
+ <ids type="enumerant" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
<!-- Enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
- <ids type="enumerant" start="6400" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
+ <ids type="enumerant" start="6464" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<!-- End reservations of enumerants -->
@@ -251,4 +254,24 @@
<ids type="MemoryOperand" start="18" end="30" comment="Unreserved bits reservable for use by vendors"/>
<ids type="MemoryOperand" start="31" end="31" vendor="Khronos" comment="Reserved MemoryOperand bit, not available to vendors"/>
+ <!-- SECTION: SPIR-V Image Operand Bit Reservations -->
+ <!-- Reserve ranges of bits in the image operands bitfield.
+
+ Each vendor determines the use of values in their own ranges.
+ Vendors are not required to disclose those uses. If the use of a
+ value is included in an extension that is adopted by a Khronos
+ extension or specification, then that value's use may be permanently
+ fixed as if originally reserved in a Khronos range.
+
+ The SPIR Working Group strongly recommends:
+ - Each value is used for only one purpose.
+ - All values in a range should be used before allocating a new range.
+ -->
+
+ <!-- Reserved image operand bits -->
+ <ids type="ImageOperand" start="0" end="15" vendor="Khronos" comment="Reserved ImageOperand bits, not available to vendors - see the SPIR-V Specification"/>
+ <ids type="ImageOperand" start="16" end="16" vendor="Nvidia" comment="Contact pmistry@nvidia.com"/>
+ <ids type="ImageOperand" start="17" end="30" comment="Unreserved bits reservable for use by vendors"/>
+ <ids type="ImageOperand" start="31" end="31" vendor="Khronos" comment="Reserved ImageOperand bit, not available to vendors"/>
+
</registry>
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index 9154496..67baec7 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -4945,6 +4945,88 @@
"version" : "None"
},
{
+ "opname" : "OpConvertUToImageNV",
+ "class" : "Reserved",
+ "opcode" : 5391,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpConvertUToSamplerNV",
+ "class" : "Reserved",
+ "opcode" : 5392,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpConvertImageToUNV",
+ "class" : "Reserved",
+ "opcode" : 5393,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpConvertSamplerToUNV",
+ "class" : "Reserved",
+ "opcode" : 5394,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpConvertUToSampledImageNV",
+ "class" : "Reserved",
+ "opcode" : 5395,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpConvertSampledImageToUNV",
+ "class" : "Reserved",
+ "opcode" : 5396,
+ "operands" : [
+ { "kind" : "IdResultType" },
+ { "kind" : "IdResult" },
+ { "kind" : "IdRef", "name" : "'Operand'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "opname" : "OpSamplerImageAddressingModeNV",
+ "class" : "Reserved",
+ "opcode" : 5397,
+ "operands" : [
+ { "kind" : "LiteralInteger", "name" : "'Bit Width'" }
+ ],
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
"opname" : "OpSubgroupShuffleINTEL",
"class" : "Group",
"opcode" : 5571,
@@ -8475,6 +8557,13 @@
"enumerant" : "ZeroExtend",
"value" : "0x2000",
"version" : "1.4"
+ },
+ {
+ "enumerant" : "Offsets",
+ "value" : "0x10000",
+ "parameters" : [
+ { "kind" : "IdRef" }
+ ]
}
]
},
@@ -11074,6 +11163,30 @@
"version" : "1.5"
},
{
+ "enumerant" : "BindlessSamplerNV",
+ "value" : 5398,
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "BindlessImageNV",
+ "value" : 5399,
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "BoundSamplerNV",
+ "value" : 5400,
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "BoundImageNV",
+ "value" : 5401,
+ "capabilities" : [ "BindlessTextureNV" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "SIMTCallINTEL",
"value" : 5599,
"parameters" : [
@@ -13215,6 +13328,12 @@
"version" : "None"
},
{
+ "enumerant" : "BindlessTextureNV",
+ "value" : 5390,
+ "extensions" : [ "SPV_NV_bindless_texture" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "SubgroupShuffleINTEL",
"value" : 5568,
"extensions" : [ "SPV_INTEL_subgroups" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index b2ca3f0..3fe564c 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -349,6 +349,7 @@
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
+ Offsets = 16,
}
public enum ImageOperandsMask
@@ -372,6 +373,7 @@
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
+ Offsets = 0x00010000,
}
public enum FPFastMathModeShift
@@ -497,6 +499,10 @@
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
+ BindlessSamplerNV = 5398,
+ BindlessImageNV = 5399,
+ BoundSamplerNV = 5400,
+ BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@@ -1011,6 +1017,7 @@
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocationEXT = 5379,
+ BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@@ -1568,6 +1575,13 @@
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
+ OpConvertUToImageNV = 5391,
+ OpConvertUToSamplerNV = 5392,
+ OpConvertImageToUNV = 5393,
+ OpConvertSamplerToUNV = 5394,
+ OpConvertUToSampledImageNV = 5395,
+ OpConvertSampledImageToUNV = 5396,
+ OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index 1443963..1f5f24f 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -357,6 +357,7 @@
SpvImageOperandsVolatileTexelKHRShift = 11,
SpvImageOperandsSignExtendShift = 12,
SpvImageOperandsZeroExtendShift = 13,
+ SpvImageOperandsOffsetsShift = 16,
SpvImageOperandsMax = 0x7fffffff,
} SpvImageOperandsShift;
@@ -380,6 +381,7 @@
SpvImageOperandsVolatileTexelKHRMask = 0x00000800,
SpvImageOperandsSignExtendMask = 0x00001000,
SpvImageOperandsZeroExtendMask = 0x00002000,
+ SpvImageOperandsOffsetsMask = 0x00010000,
} SpvImageOperandsMask;
typedef enum SpvFPFastMathModeShift_ {
@@ -503,6 +505,10 @@
SpvDecorationRestrictPointerEXT = 5355,
SpvDecorationAliasedPointer = 5356,
SpvDecorationAliasedPointerEXT = 5356,
+ SpvDecorationBindlessSamplerNV = 5398,
+ SpvDecorationBindlessImageNV = 5399,
+ SpvDecorationBoundSamplerNV = 5400,
+ SpvDecorationBoundImageNV = 5401,
SpvDecorationSIMTCallINTEL = 5599,
SpvDecorationReferencedIndirectlyINTEL = 5602,
SpvDecorationClobberINTEL = 5607,
@@ -1011,6 +1017,7 @@
SpvCapabilityShaderSMBuiltinsNV = 5373,
SpvCapabilityFragmentShaderPixelInterlockEXT = 5378,
SpvCapabilityDemoteToHelperInvocationEXT = 5379,
+ SpvCapabilityBindlessTextureNV = 5390,
SpvCapabilitySubgroupShuffleINTEL = 5568,
SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
@@ -1566,6 +1573,13 @@
SpvOpEndInvocationInterlockEXT = 5365,
SpvOpDemoteToHelperInvocationEXT = 5380,
SpvOpIsHelperInvocationEXT = 5381,
+ SpvOpConvertUToImageNV = 5391,
+ SpvOpConvertUToSamplerNV = 5392,
+ SpvOpConvertImageToUNV = 5393,
+ SpvOpConvertSamplerToUNV = 5394,
+ SpvOpConvertUToSampledImageNV = 5395,
+ SpvOpConvertSampledImageToUNV = 5396,
+ SpvOpSamplerImageAddressingModeNV = 5397,
SpvOpSubgroupShuffleINTEL = 5571,
SpvOpSubgroupShuffleDownINTEL = 5572,
SpvOpSubgroupShuffleUpINTEL = 5573,
@@ -2212,6 +2226,13 @@
case SpvOpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index 5180457..79502c0 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -353,6 +353,7 @@
ImageOperandsVolatileTexelKHRShift = 11,
ImageOperandsSignExtendShift = 12,
ImageOperandsZeroExtendShift = 13,
+ ImageOperandsOffsetsShift = 16,
ImageOperandsMax = 0x7fffffff,
};
@@ -376,6 +377,7 @@
ImageOperandsVolatileTexelKHRMask = 0x00000800,
ImageOperandsSignExtendMask = 0x00001000,
ImageOperandsZeroExtendMask = 0x00002000,
+ ImageOperandsOffsetsMask = 0x00010000,
};
enum FPFastMathModeShift {
@@ -499,6 +501,10 @@
DecorationRestrictPointerEXT = 5355,
DecorationAliasedPointer = 5356,
DecorationAliasedPointerEXT = 5356,
+ DecorationBindlessSamplerNV = 5398,
+ DecorationBindlessImageNV = 5399,
+ DecorationBoundSamplerNV = 5400,
+ DecorationBoundImageNV = 5401,
DecorationSIMTCallINTEL = 5599,
DecorationReferencedIndirectlyINTEL = 5602,
DecorationClobberINTEL = 5607,
@@ -1007,6 +1013,7 @@
CapabilityShaderSMBuiltinsNV = 5373,
CapabilityFragmentShaderPixelInterlockEXT = 5378,
CapabilityDemoteToHelperInvocationEXT = 5379,
+ CapabilityBindlessTextureNV = 5390,
CapabilitySubgroupShuffleINTEL = 5568,
CapabilitySubgroupBufferBlockIOINTEL = 5569,
CapabilitySubgroupImageBlockIOINTEL = 5570,
@@ -1562,6 +1569,13 @@
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
+ OpConvertUToImageNV = 5391,
+ OpConvertUToSamplerNV = 5392,
+ OpConvertImageToUNV = 5393,
+ OpConvertSamplerToUNV = 5394,
+ OpConvertUToSampledImageNV = 5395,
+ OpConvertSampledImageToUNV = 5396,
+ OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@@ -2208,6 +2222,13 @@
case OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case OpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
+ case OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
+ case OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
+ case OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case OpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
+ case OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
+ case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 51e9024..38e1a0a 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -353,6 +353,7 @@
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
+ Offsets = 16,
Max = 0x7fffffff,
};
@@ -376,6 +377,7 @@
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
+ Offsets = 0x00010000,
};
enum class FPFastMathModeShift : unsigned {
@@ -499,6 +501,10 @@
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
+ BindlessSamplerNV = 5398,
+ BindlessImageNV = 5399,
+ BoundSamplerNV = 5400,
+ BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@@ -1007,6 +1013,7 @@
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocationEXT = 5379,
+ BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@@ -1562,6 +1569,13 @@
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
+ OpConvertUToImageNV = 5391,
+ OpConvertUToSamplerNV = 5392,
+ OpConvertImageToUNV = 5393,
+ OpConvertSamplerToUNV = 5394,
+ OpConvertUToSampledImageNV = 5395,
+ OpConvertSampledImageToUNV = 5396,
+ OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@@ -2208,6 +2222,13 @@
case Op::OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case Op::OpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case Op::OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
+ case Op::OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 017b842..c13c6a8 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -395,7 +395,8 @@
"VolatileTexel": 11,
"VolatileTexelKHR": 11,
"SignExtend": 12,
- "ZeroExtend": 13
+ "ZeroExtend": 13,
+ "Offsets": 16
}
},
{
@@ -527,6 +528,10 @@
"RestrictPointerEXT": 5355,
"AliasedPointer": 5356,
"AliasedPointerEXT": 5356,
+ "BindlessSamplerNV": 5398,
+ "BindlessImageNV": 5399,
+ "BoundSamplerNV": 5400,
+ "BoundImageNV": 5401,
"SIMTCallINTEL": 5599,
"ReferencedIndirectlyINTEL": 5602,
"ClobberINTEL": 5607,
@@ -993,6 +998,7 @@
"ShaderSMBuiltinsNV": 5373,
"FragmentShaderPixelInterlockEXT": 5378,
"DemoteToHelperInvocationEXT": 5379,
+ "BindlessTextureNV": 5390,
"SubgroupShuffleINTEL": 5568,
"SubgroupBufferBlockIOINTEL": 5569,
"SubgroupImageBlockIOINTEL": 5570,
@@ -1559,6 +1565,13 @@
"OpEndInvocationInterlockEXT": 5365,
"OpDemoteToHelperInvocationEXT": 5380,
"OpIsHelperInvocationEXT": 5381,
+ "OpConvertUToImageNV": 5391,
+ "OpConvertUToSamplerNV": 5392,
+ "OpConvertImageToUNV": 5393,
+ "OpConvertSamplerToUNV": 5394,
+ "OpConvertUToSampledImageNV": 5395,
+ "OpConvertSampledImageToUNV": 5396,
+ "OpSamplerImageAddressingModeNV": 5397,
"OpSubgroupShuffleINTEL": 5571,
"OpSubgroupShuffleDownINTEL": 5572,
"OpSubgroupShuffleUpINTEL": 5573,
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 46665d8..463b545 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -332,6 +332,7 @@
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
+ Offsets = 16,
},
ImageOperandsMask = {
@@ -354,6 +355,7 @@
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
+ Offsets = 0x00010000,
},
FPFastMathModeShift = {
@@ -472,6 +474,10 @@
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
+ BindlessSamplerNV = 5398,
+ BindlessImageNV = 5399,
+ BoundSamplerNV = 5400,
+ BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@@ -969,6 +975,7 @@
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocationEXT = 5379,
+ BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@@ -1513,6 +1520,13 @@
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
+ OpConvertUToImageNV = 5391,
+ OpConvertUToSamplerNV = 5392,
+ OpConvertImageToUNV = 5393,
+ OpConvertSamplerToUNV = 5394,
+ OpConvertUToSampledImageNV = 5395,
+ OpConvertSampledImageToUNV = 5396,
+ OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index a780191..7a2ec3c 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -332,6 +332,7 @@
'VolatileTexelKHR' : 11,
'SignExtend' : 12,
'ZeroExtend' : 13,
+ 'Offsets' : 16,
},
'ImageOperandsMask' : {
@@ -354,6 +355,7 @@
'VolatileTexelKHR' : 0x00000800,
'SignExtend' : 0x00001000,
'ZeroExtend' : 0x00002000,
+ 'Offsets' : 0x00010000,
},
'FPFastMathModeShift' : {
@@ -472,6 +474,10 @@
'RestrictPointerEXT' : 5355,
'AliasedPointer' : 5356,
'AliasedPointerEXT' : 5356,
+ 'BindlessSamplerNV' : 5398,
+ 'BindlessImageNV' : 5399,
+ 'BoundSamplerNV' : 5400,
+ 'BoundImageNV' : 5401,
'SIMTCallINTEL' : 5599,
'ReferencedIndirectlyINTEL' : 5602,
'ClobberINTEL' : 5607,
@@ -969,6 +975,7 @@
'ShaderSMBuiltinsNV' : 5373,
'FragmentShaderPixelInterlockEXT' : 5378,
'DemoteToHelperInvocationEXT' : 5379,
+ 'BindlessTextureNV' : 5390,
'SubgroupShuffleINTEL' : 5568,
'SubgroupBufferBlockIOINTEL' : 5569,
'SubgroupImageBlockIOINTEL' : 5570,
@@ -1513,6 +1520,13 @@
'OpEndInvocationInterlockEXT' : 5365,
'OpDemoteToHelperInvocationEXT' : 5380,
'OpIsHelperInvocationEXT' : 5381,
+ 'OpConvertUToImageNV' : 5391,
+ 'OpConvertUToSamplerNV' : 5392,
+ 'OpConvertImageToUNV' : 5393,
+ 'OpConvertSamplerToUNV' : 5394,
+ 'OpConvertUToSampledImageNV' : 5395,
+ 'OpConvertSampledImageToUNV' : 5396,
+ 'OpSamplerImageAddressingModeNV' : 5397,
'OpSubgroupShuffleINTEL' : 5571,
'OpSubgroupShuffleDownINTEL' : 5572,
'OpSubgroupShuffleUpINTEL' : 5573,
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index b85517a..159541b 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -352,6 +352,7 @@
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
+ Offsets = 16,
}
enum ImageOperandsMask : uint
@@ -375,6 +376,7 @@
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
+ Offsets = 0x00010000,
}
enum FPFastMathModeShift : uint
@@ -500,6 +502,10 @@
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
+ BindlessSamplerNV = 5398,
+ BindlessImageNV = 5399,
+ BoundSamplerNV = 5400,
+ BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@@ -1014,6 +1020,7 @@
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocationEXT = 5379,
+ BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@@ -1571,6 +1578,13 @@
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
+ OpConvertUToImageNV = 5391,
+ OpConvertUToSamplerNV = 5392,
+ OpConvertImageToUNV = 5393,
+ OpConvertSamplerToUNV = 5394,
+ OpConvertUToSampledImageNV = 5395,
+ OpConvertSampledImageToUNV = 5396,
+ OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
