diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index bf691db..9259fdc 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -7573,30 +7573,6 @@
       "version" : "None"
     },
     {
-      "opname" : "OpPtrCastToCrossWorkgroupINTEL",
-      "class"  : "@exclude",
-      "opcode" : 5934,
-      "operands" : [
-        { "kind" : "IdResultType" },
-        { "kind" : "IdResult" },
-        { "kind" : "IdRef", "name" : "'Pointer'" }
-      ],
-      "capabilities" : [ "USMStorageClassesINTEL" ],
-      "version" : "None"
-    },
-    {
-      "opname" : "OpCrossWorkgroupCastToPtrINTEL",
-      "class"  : "@exclude",
-      "opcode" : 5938,
-      "operands" : [
-        { "kind" : "IdResultType" },
-        { "kind" : "IdResult" },
-        { "kind" : "IdRef", "name" : "'Pointer'" }
-      ],
-      "capabilities" : [ "USMStorageClassesINTEL" ],
-      "version" : "None"
-    },
-    {
       "opname" : "OpFixedSqrtINTEL",
       "class"  : "@exclude",
       "opcode" : 5923,
@@ -7795,6 +7771,30 @@
       "version" : "None"
     },
     {
+      "opname" : "OpPtrCastToCrossWorkgroupINTEL",
+      "class"  : "@exclude",
+      "opcode" : 5934,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdRef", "name" : "'Pointer'" }
+      ],
+      "capabilities" : [ "USMStorageClassesINTEL" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpCrossWorkgroupCastToPtrINTEL",
+      "class"  : "@exclude",
+      "opcode" : 5938,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdRef", "name" : "'Pointer'" }
+      ],
+      "capabilities" : [ "USMStorageClassesINTEL" ],
+      "version" : "None"
+    },
+    {
       "opname" : "OpReadPipeBlockingINTEL",
       "class"  : "Pipe",
       "opcode" : 5946,
@@ -13260,6 +13260,12 @@
           "version" : "None"
         },
         {
+          "enumerant" : "ArbitraryPrecisionFixedPointINTEL",
+          "value" : 5922,
+          "extensions" : [ "SPV_INTEL_arbitrary_precision_fixed_point" ],
+          "version" : "None"
+        },
+        {
           "enumerant" : "USMStorageClassesINTEL",
           "value" : 5935,
           "extensions" : [ "SPV_INTEL_usm_storage_classes" ],
@@ -13272,12 +13278,6 @@
           "version" : "None"
         },
         {
-          "enumerant" : "ArbitraryPrecisionFixedPointINTEL",
-          "value" : 5922,
-          "extensions" : [ "SPV_INTEL_arbitrary_precision_fixed_point" ],
-          "version" : "None"
-        },
-        {
           "enumerant" : "BlockingPipesINTEL",
           "value" : 5945,
           "extensions" : [ "SPV_INTEL_blocking_pipes" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index fa0aa15..4d130a1 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -405,38 +405,6 @@
             RTN = 3,
         }
 
-        public enum FPDenormMode
-        {
-            Preserve = 0,
-            FlushToZero = 1,
-        }
-
-        public enum FPOperationMode
-        {
-            IEEE = 0,
-            ALT = 1,
-        }
-
-        public enum QuantizationModes
-        {
-            TRN = 0,
-            TRN_ZERO = 1,
-            RND = 2,
-            RND_ZERO = 3,
-            RND_INF = 4,
-            RND_MIN_INF = 5,
-            RND_CONV = 6,
-            RND_CONV_ODD = 7,
-        }
-
-        public enum OverflowModes
-        {
-            WRAP = 0,
-            SAT = 1,
-            SAT_ZERO = 2,
-            SAT_SYM = 3,
-        }
-
         public enum LinkageType
         {
             Export = 0,
@@ -1147,6 +1115,38 @@
             Horizontal4Pixels = 0x00000008,
         }
 
+        public enum FPDenormMode
+        {
+            Preserve = 0,
+            FlushToZero = 1,
+        }
+
+        public enum FPOperationMode
+        {
+            IEEE = 0,
+            ALT = 1,
+        }
+
+        public enum QuantizationModes
+        {
+            TRN = 0,
+            TRN_ZERO = 1,
+            RND = 2,
+            RND_ZERO = 3,
+            RND_INF = 4,
+            RND_MIN_INF = 5,
+            RND_CONV = 6,
+            RND_CONV_ODD = 7,
+        }
+
+        public enum OverflowModes
+        {
+            WRAP = 0,
+            SAT = 1,
+            SAT_ZERO = 2,
+            SAT_SYM = 3,
+        }
+
         public enum Op
         {
             OpNop = 0,
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index 7cfa926..0ba7862 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -412,38 +412,6 @@
     SpvFPRoundingModeMax = 0x7fffffff,
 } SpvFPRoundingMode;
 
-typedef enum SpvFPDenormMode_ {
-    SpvFPDenormModePreserve = 0,
-    SpvFPDenormModeFlushToZero = 1,
-    SpvFPDenormModeMax = 0x7fffffff,
-} SpvFPDenormMode;
-
-typedef enum SpvFPOperationMode_ {
-    SpvFPOperationModeIEEE = 0,
-    SpvFPOperationModeALT = 1,
-    SpvFPOperationModeMax = 0x7fffffff,
-} SpvFPOperationMode;
-
-typedef enum SpvQuantizationModes_ {
-    SpvQuantizationModesTRN = 0,
-    SpvQuantizationModesTRN_ZERO = 1,
-    SpvQuantizationModesRND = 2,
-    SpvQuantizationModesRND_ZERO = 3,
-    SpvQuantizationModesRND_INF = 4,
-    SpvQuantizationModesRND_MIN_INF = 5,
-    SpvQuantizationModesRND_CONV = 6,
-    SpvQuantizationModesRND_CONV_ODD = 7,
-    SpvQuantizationModesMax = 0x7fffffff,
-} SpvQuantizationModes;
-
-typedef enum SpvOverflowModes_ {
-    SpvOverflowModesWRAP = 0,
-    SpvOverflowModesSAT = 1,
-    SpvOverflowModesSAT_ZERO = 2,
-    SpvOverflowModesSAT_SYM = 3,
-    SpvOverflowModesMax = 0x7fffffff,
-} SpvOverflowModes;
-
 typedef enum SpvLinkageType_ {
     SpvLinkageTypeExport = 0,
     SpvLinkageTypeImport = 1,
@@ -1146,6 +1114,38 @@
     SpvFragmentShadingRateHorizontal4PixelsMask = 0x00000008,
 } SpvFragmentShadingRateMask;
 
+typedef enum SpvFPDenormMode_ {
+    SpvFPDenormModePreserve = 0,
+    SpvFPDenormModeFlushToZero = 1,
+    SpvFPDenormModeMax = 0x7fffffff,
+} SpvFPDenormMode;
+
+typedef enum SpvFPOperationMode_ {
+    SpvFPOperationModeIEEE = 0,
+    SpvFPOperationModeALT = 1,
+    SpvFPOperationModeMax = 0x7fffffff,
+} SpvFPOperationMode;
+
+typedef enum SpvQuantizationModes_ {
+    SpvQuantizationModesTRN = 0,
+    SpvQuantizationModesTRN_ZERO = 1,
+    SpvQuantizationModesRND = 2,
+    SpvQuantizationModesRND_ZERO = 3,
+    SpvQuantizationModesRND_INF = 4,
+    SpvQuantizationModesRND_MIN_INF = 5,
+    SpvQuantizationModesRND_CONV = 6,
+    SpvQuantizationModesRND_CONV_ODD = 7,
+    SpvQuantizationModesMax = 0x7fffffff,
+} SpvQuantizationModes;
+
+typedef enum SpvOverflowModes_ {
+    SpvOverflowModesWRAP = 0,
+    SpvOverflowModesSAT = 1,
+    SpvOverflowModesSAT_ZERO = 2,
+    SpvOverflowModesSAT_SYM = 3,
+    SpvOverflowModesMax = 0x7fffffff,
+} SpvOverflowModes;
+
 typedef enum SpvOp_ {
     SpvOpNop = 0,
     SpvOpUndef = 1,
@@ -2377,8 +2377,6 @@
     case SpvOpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
-    case SpvOpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
-    case SpvOpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@@ -2390,6 +2388,8 @@
     case SpvOpFixedSinCosPiINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFixedLogINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFixedExpINTEL: *hasResult = true; *hasResultType = true; break;
+    case SpvOpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
+    case SpvOpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpReadPipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpWritePipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpFPGARegINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index f30c71c..06b4384 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -408,38 +408,6 @@
     FPRoundingModeMax = 0x7fffffff,
 };
 
-enum FPDenormMode {
-    FPDenormModePreserve = 0,
-    FPDenormModeFlushToZero = 1,
-    FPDenormModeMax = 0x7fffffff,
-};
-
-enum FPOperationMode {
-    FPOperationModeIEEE = 0,
-    FPOperationModeALT = 1,
-    FPOperationModeMax = 0x7fffffff,
-};
-
-enum QuantizationModes {
-    QuantizationModesTRN = 0,
-    QuantizationModesTRN_ZERO = 1,
-    QuantizationModesRND = 2,
-    QuantizationModesRND_ZERO = 3,
-    QuantizationModesRND_INF = 4,
-    QuantizationModesRND_MIN_INF = 5,
-    QuantizationModesRND_CONV = 6,
-    QuantizationModesRND_CONV_ODD = 7,
-    QuantizationModesMax = 0x7fffffff,
-};
-
-enum OverflowModes {
-    OverflowModesWRAP = 0,
-    OverflowModesSAT = 1,
-    OverflowModesSAT_ZERO = 2,
-    OverflowModesSAT_SYM = 3,
-    OverflowModesMax = 0x7fffffff,
-};
-
 enum LinkageType {
     LinkageTypeExport = 0,
     LinkageTypeImport = 1,
@@ -1142,6 +1110,38 @@
     FragmentShadingRateHorizontal4PixelsMask = 0x00000008,
 };
 
+enum FPDenormMode {
+    FPDenormModePreserve = 0,
+    FPDenormModeFlushToZero = 1,
+    FPDenormModeMax = 0x7fffffff,
+};
+
+enum FPOperationMode {
+    FPOperationModeIEEE = 0,
+    FPOperationModeALT = 1,
+    FPOperationModeMax = 0x7fffffff,
+};
+
+enum QuantizationModes {
+    QuantizationModesTRN = 0,
+    QuantizationModesTRN_ZERO = 1,
+    QuantizationModesRND = 2,
+    QuantizationModesRND_ZERO = 3,
+    QuantizationModesRND_INF = 4,
+    QuantizationModesRND_MIN_INF = 5,
+    QuantizationModesRND_CONV = 6,
+    QuantizationModesRND_CONV_ODD = 7,
+    QuantizationModesMax = 0x7fffffff,
+};
+
+enum OverflowModes {
+    OverflowModesWRAP = 0,
+    OverflowModesSAT = 1,
+    OverflowModesSAT_ZERO = 2,
+    OverflowModesSAT_SYM = 3,
+    OverflowModesMax = 0x7fffffff,
+};
+
 enum Op {
     OpNop = 0,
     OpUndef = 1,
@@ -2373,8 +2373,6 @@
     case OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
     case OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
     case OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
-    case OpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
-    case OpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@@ -2386,6 +2384,8 @@
     case OpFixedSinCosPiINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFixedLogINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFixedExpINTEL: *hasResult = true; *hasResultType = true; break;
+    case OpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
+    case OpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case OpReadPipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case OpWritePipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case OpFPGARegINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 2e31831..20aaeb6 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -408,38 +408,6 @@
     Max = 0x7fffffff,
 };
 
-enum class FPDenormMode : unsigned {
-    Preserve = 0,
-    FlushToZero = 1,
-    Max = 0x7fffffff,
-};
-
-enum class FPOperationMode : unsigned {
-    IEEE = 0,
-    ALT = 1,
-    Max = 0x7fffffff,
-};
-
-enum class QuantizationModes : unsigned {
-    TRN = 0,
-    TRN_ZERO = 1,
-    RND = 2,
-    RND_ZERO = 3,
-    RND_INF = 4,
-    RND_MIN_INF = 5,
-    RND_CONV = 6,
-    RND_CONV_ODD = 7,
-    Max = 0x7fffffff,
-};
-
-enum class OverflowModes : unsigned {
-    WRAP = 0,
-    SAT = 1,
-    SAT_ZERO = 2,
-    SAT_SYM = 3,
-    Max = 0x7fffffff,
-};
-
 enum class LinkageType : unsigned {
     Export = 0,
     Import = 1,
@@ -1142,6 +1110,38 @@
     Horizontal4Pixels = 0x00000008,
 };
 
+enum class FPDenormMode : unsigned {
+    Preserve = 0,
+    FlushToZero = 1,
+    Max = 0x7fffffff,
+};
+
+enum class FPOperationMode : unsigned {
+    IEEE = 0,
+    ALT = 1,
+    Max = 0x7fffffff,
+};
+
+enum class QuantizationModes : unsigned {
+    TRN = 0,
+    TRN_ZERO = 1,
+    RND = 2,
+    RND_ZERO = 3,
+    RND_INF = 4,
+    RND_MIN_INF = 5,
+    RND_CONV = 6,
+    RND_CONV_ODD = 7,
+    Max = 0x7fffffff,
+};
+
+enum class OverflowModes : unsigned {
+    WRAP = 0,
+    SAT = 1,
+    SAT_ZERO = 2,
+    SAT_SYM = 3,
+    Max = 0x7fffffff,
+};
+
 enum class Op : unsigned {
     OpNop = 0,
     OpUndef = 1,
@@ -2373,8 +2373,6 @@
     case Op::OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
-    case Op::OpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
-    case Op::OpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@@ -2386,6 +2384,8 @@
     case Op::OpFixedSinCosPiINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFixedLogINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFixedExpINTEL: *hasResult = true; *hasResultType = true; break;
+    case Op::OpPtrCastToCrossWorkgroupINTEL: *hasResult = true; *hasResultType = true; break;
+    case Op::OpCrossWorkgroupCastToPtrINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpReadPipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpWritePipeBlockingINTEL: *hasResult = true; *hasResultType = true; break;
     case Op::OpFPGARegINTEL: *hasResult = true; *hasResultType = true; break;
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index fdef20a..74815c9 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -424,50 +424,6 @@
                 }
             },
             {
-                "Name": "FPDenormMode",
-                "Type": "Value",
-                "Values":
-                {
-                    "Preserve": 0,
-                    "FlushToZero": 1
-                }
-            },
-            {
-                "Name": "FPOperationMode",
-                "Type": "Value",
-                "Values":
-                {
-                    "IEEE": 0,
-                    "ALT": 1
-                }
-            },
-            {
-                "Name": "QuantizationModes",
-                "Type": "Value",
-                "Values":
-                {
-                    "TRN": 0,
-                    "TRN_ZERO": 1,
-                    "RND": 2,
-                    "RND_ZERO": 3,
-                    "RND_INF": 4,
-                    "RND_MIN_INF": 5,
-                    "RND_CONV": 6,
-                    "RND_CONV_ODD": 7
-                }
-            },
-            {
-                "Name": "OverflowModes",
-                "Type": "Value",
-                "Values":
-                {
-                    "WRAP": 0,
-                    "SAT": 1,
-                    "SAT_ZERO": 2,
-                    "SAT_SYM": 3
-                }
-            },
-            {
                 "Name": "LinkageType",
                 "Type": "Value",
                 "Values":
@@ -1134,6 +1090,50 @@
                 }
             },
             {
+                "Name": "FPDenormMode",
+                "Type": "Value",
+                "Values":
+                {
+                    "Preserve": 0,
+                    "FlushToZero": 1
+                }
+            },
+            {
+                "Name": "FPOperationMode",
+                "Type": "Value",
+                "Values":
+                {
+                    "IEEE": 0,
+                    "ALT": 1
+                }
+            },
+            {
+                "Name": "QuantizationModes",
+                "Type": "Value",
+                "Values":
+                {
+                    "TRN": 0,
+                    "TRN_ZERO": 1,
+                    "RND": 2,
+                    "RND_ZERO": 3,
+                    "RND_INF": 4,
+                    "RND_MIN_INF": 5,
+                    "RND_CONV": 6,
+                    "RND_CONV_ODD": 7
+                }
+            },
+            {
+                "Name": "OverflowModes",
+                "Type": "Value",
+                "Values":
+                {
+                    "WRAP": 0,
+                    "SAT": 1,
+                    "SAT_ZERO": 2,
+                    "SAT_SYM": 3
+                }
+            },
+            {
                 "Name": "Op",
                 "Type": "Value",
                 "Values":
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index 8034a44..f1e81de 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -384,34 +384,6 @@
         RTN = 3,
     },
 
-    FPDenormMode = {
-        Preserve = 0,
-        FlushToZero = 1,
-    },
-
-    FPOperationMode = {
-        IEEE = 0,
-        ALT = 1,
-    },
-
-    QuantizationModes = {
-        TRN = 0,
-        TRN_ZERO = 1,
-        RND = 2,
-        RND_ZERO = 3,
-        RND_INF = 4,
-        RND_MIN_INF = 5,
-        RND_CONV = 6,
-        RND_CONV_ODD = 7,
-    },
-
-    OverflowModes = {
-        WRAP = 0,
-        SAT = 1,
-        SAT_ZERO = 2,
-        SAT_SYM = 3,
-    },
-
     LinkageType = {
         Export = 0,
         Import = 1,
@@ -1094,6 +1066,34 @@
         Horizontal4Pixels = 0x00000008,
     },
 
+    FPDenormMode = {
+        Preserve = 0,
+        FlushToZero = 1,
+    },
+
+    FPOperationMode = {
+        IEEE = 0,
+        ALT = 1,
+    },
+
+    QuantizationModes = {
+        TRN = 0,
+        TRN_ZERO = 1,
+        RND = 2,
+        RND_ZERO = 3,
+        RND_INF = 4,
+        RND_MIN_INF = 5,
+        RND_CONV = 6,
+        RND_CONV_ODD = 7,
+    },
+
+    OverflowModes = {
+        WRAP = 0,
+        SAT = 1,
+        SAT_ZERO = 2,
+        SAT_SYM = 3,
+    },
+
     Op = {
         OpNop = 0,
         OpUndef = 1,
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index ba6c38b..4fc2ddd 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -384,34 +384,6 @@
         'RTN' : 3,
     },
 
-    'FPDenormMode' : {
-        'Preserve' : 0,
-        'FlushToZero' : 1,
-    },
-
-    'FPOperationMode' : {
-        'IEEE' : 0,
-        'ALT' : 1,
-    },
-
-    'QuantizationModes' : {
-        'TRN' : 0,
-        'TRN_ZERO' : 1,
-        'RND' : 2,
-        'RND_ZERO' : 3,
-        'RND_INF' : 4,
-        'RND_MIN_INF' : 5,
-        'RND_CONV' : 6,
-        'RND_CONV_ODD' : 7,
-    },
-
-    'OverflowModes' : {
-        'WRAP' : 0,
-        'SAT' : 1,
-        'SAT_ZERO' : 2,
-        'SAT_SYM' : 3,
-    },
-
     'LinkageType' : {
         'Export' : 0,
         'Import' : 1,
@@ -1094,6 +1066,34 @@
         'Horizontal4Pixels' : 0x00000008,
     },
 
+    'FPDenormMode' : {
+        'Preserve' : 0,
+        'FlushToZero' : 1,
+    },
+
+    'FPOperationMode' : {
+        'IEEE' : 0,
+        'ALT' : 1,
+    },
+
+    'QuantizationModes' : {
+        'TRN' : 0,
+        'TRN_ZERO' : 1,
+        'RND' : 2,
+        'RND_ZERO' : 3,
+        'RND_INF' : 4,
+        'RND_MIN_INF' : 5,
+        'RND_CONV' : 6,
+        'RND_CONV_ODD' : 7,
+    },
+
+    'OverflowModes' : {
+        'WRAP' : 0,
+        'SAT' : 1,
+        'SAT_ZERO' : 2,
+        'SAT_SYM' : 3,
+    },
+
     'Op' : {
         'OpNop' : 0,
         'OpUndef' : 1,
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index c875904..d15b3f5 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -408,38 +408,6 @@
     RTN = 3,
 }
 
-enum FPDenormMode : uint
-{
-    Preserve = 0,
-    FlushToZero = 1,
-}
-
-enum FPOperationMode : uint
-{
-    IEEE = 0,
-    ALT = 1,
-}
-
-enum QuantizationModes : uint
-{
-    TRN = 0,
-    TRN_ZERO = 1,
-    RND = 2,
-    RND_ZERO = 3,
-    RND_INF = 4,
-    RND_MIN_INF = 5,
-    RND_CONV = 6,
-    RND_CONV_ODD = 7,
-}
-
-enum OverflowModes : uint
-{
-    WRAP = 0,
-    SAT = 1,
-    SAT_ZERO = 2,
-    SAT_SYM = 3,
-}
-
 enum LinkageType : uint
 {
     Export = 0,
@@ -1150,6 +1118,38 @@
     Horizontal4Pixels = 0x00000008,
 }
 
+enum FPDenormMode : uint
+{
+    Preserve = 0,
+    FlushToZero = 1,
+}
+
+enum FPOperationMode : uint
+{
+    IEEE = 0,
+    ALT = 1,
+}
+
+enum QuantizationModes : uint
+{
+    TRN = 0,
+    TRN_ZERO = 1,
+    RND = 2,
+    RND_ZERO = 3,
+    RND_INF = 4,
+    RND_MIN_INF = 5,
+    RND_CONV = 6,
+    RND_CONV_ODD = 7,
+}
+
+enum OverflowModes : uint
+{
+    WRAP = 0,
+    SAT = 1,
+    SAT_ZERO = 2,
+    SAT_SYM = 3,
+}
+
 enum Op : uint
 {
     OpNop = 0,